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| author | Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> | 2015-01-16 09:09:48 +0100 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-29 12:00:50 -0500 |
| commit | 03843da5d542b4516666434361c3a2211aa180ed (patch) | |
| tree | 94478575b236602ee7a4fcb929ac30c77651e4e5 /arch/arm/cpu | |
| parent | 168f594765cb4692362e6e552c272c034e7efd88 (diff) | |
| download | u-boot-imx-03843da5d542b4516666434361c3a2211aa180ed.zip u-boot-imx-03843da5d542b4516666434361c3a2211aa180ed.tar.gz u-boot-imx-03843da5d542b4516666434361c3a2211aa180ed.tar.bz2 | |
omap3: make SDRC SHARING setting configurable
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/sdrc.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 7a29131..4f15ac9 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -135,6 +135,9 @@ void do_sdrc_init(u32 cs, u32 early) sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE; sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE; + /* set some default timings */ + timings.sharing = SDRC_SHARING; + /* * When called in the early context this may be SPL and we will * need to set all of the timings. This ends up being board @@ -145,6 +148,7 @@ void do_sdrc_init(u32 cs, u32 early) * setup CS1. */ #ifdef CONFIG_SPL_BUILD + /* set/modify board-specific timings */ get_board_mem_timings(&timings); #endif if (early) { @@ -155,7 +159,7 @@ void do_sdrc_init(u32 cs, u32 early) writel(0, &sdrc_base->sysconfig); /* setup sdrc to ball mux */ - writel(SDRC_SHARING, &sdrc_base->sharing); + writel(timings.sharing, &sdrc_base->sharing); /* Disable Power Down of CKE because of 1 CKE on combo part */ writel(WAKEUPPROC | SRFRONRESET | PAGEPOLICY_HIGH, |