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author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:28:56 -0600 |
---|---|---|
committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:05 -0700 |
commit | dfb42fc95df6b5908fb593db9132018233430fe9 (patch) | |
tree | 5015bb6c6c7e60401182b4306b6e83df1c014386 /arch/arm/cpu/tegra20-common | |
parent | a45fa436854a4116c19dd8794c9b033a3cf117bc (diff) | |
download | u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.zip u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.tar.gz u-boot-imx-dfb42fc95df6b5908fb593db9132018233430fe9.tar.bz2 |
ARM: tegra: pinmux naming consistency fixes
Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
compiles. A separate per-SoC change will be made immediately following,
in order to keep individual patch size down.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra20-common')
-rw-r--r-- | arch/arm/cpu/tegra20-common/funcmux.c | 6 | ||||
-rw-r--r-- | arch/arm/cpu/tegra20-common/pinmux.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c index 1931908..8ae2867 100644 --- a/arch/arm/cpu/tegra20-common/funcmux.c +++ b/arch/arm/cpu/tegra20-common/funcmux.c @@ -16,7 +16,7 @@ #define PINMUX(grp, mux, pupd, tri) \ {PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri} -static const struct pingroup_config disp1_default[] = { +static const struct pmux_pingrp_config disp1_default[] = { PINMUX(LDI, DISPA, NORMAL, NORMAL), PINMUX(LHP0, DISPA, NORMAL, NORMAL), PINMUX(LHP1, DISPA, NORMAL, NORMAL), @@ -275,8 +275,8 @@ int funcmux_select(enum periph_id id, int config) pinmux_tristate_disable(i); pinmux_set_pullupdown(i, PMUX_PULL_NORMAL); } - pinmux_config_table(disp1_default, - ARRAY_SIZE(disp1_default)); + pinmux_config_pingrp_table(disp1_default, + ARRAY_SIZE(disp1_default)); } break; diff --git a/arch/arm/cpu/tegra20-common/pinmux.c b/arch/arm/cpu/tegra20-common/pinmux.c index 9e34c8b..4c89995 100644 --- a/arch/arm/cpu/tegra20-common/pinmux.c +++ b/arch/arm/cpu/tegra20-common/pinmux.c @@ -283,7 +283,7 @@ enum pmux_pullid { #define PMUX_FUNC_RSVD PMUX_FUNC_RSVD1 -static const struct tegra_pingroup_desc tegra20_pingroups[] = { +static const struct pmux_pingrp_desc tegra20_pingroups[] = { PIN(ATA, NAND, IDE, NAND, GMI, RSVD, IDE), PIN(ATB, NAND, IDE, NAND, GMI, SDIO4, IDE), PIN(ATC, NAND, IDE, NAND, GMI, SDIO4, IDE), @@ -434,4 +434,4 @@ static const struct tegra_pingroup_desc tegra20_pingroups[] = { PINALL(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, MUXCTL_NONE, PUCTL_NONE), }; -const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra20_pingroups; +const struct pmux_pingrp_desc *tegra_soc_pingroups = tegra20_pingroups; |