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| author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:28:53 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:05 -0700 |
| commit | 19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb (patch) | |
| tree | b5d9181495ded2c5d57752c2a96abdd5b404452a /arch/arm/cpu/tegra20-common/warmboot.c | |
| parent | 07bbd48b4785f28b41ceeab4337d7690837e6ec1 (diff) | |
| download | u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.zip u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.tar.gz u-boot-imx-19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb.tar.bz2 | |
ARM: tegra: use apb_misc.h in more places
Tegra's "APB misc" register region contains various miscellaneous
registers and the Tegra pinmux registers. Some code that touches the
misc registers currently uses struct pmux_tri_ctlr, which is intended to
be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl,
which is intended to be a definition of the miscellaneous registers.
Convert all such code to use struct apb_misc_pp_ctrl, since struct
pmux_tri_ctlr goes away in the next patch.
This requires adding a missing field definition to struct
apb_misc_pp_ctrl, and moving the header into a more common location.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra20-common/warmboot.c')
| -rw-r--r-- | arch/arm/cpu/tegra20-common/warmboot.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/cpu/tegra20-common/warmboot.c b/arch/arm/cpu/tegra20-common/warmboot.c index 8beba53..5fdc4bb 100644 --- a/arch/arm/cpu/tegra20-common/warmboot.c +++ b/arch/arm/cpu/tegra20-common/warmboot.c @@ -15,6 +15,7 @@ #include <asm/arch/sdram_param.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/apb_misc.h> #include <asm/arch-tegra/clk_rst.h> #include <asm/arch-tegra/pmc.h> #include <asm/arch-tegra/fuse.h> @@ -122,7 +123,8 @@ int warmboot_save_sdram_params(void) { u32 ram_code; struct sdram_params sdram; - struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE; + struct apb_misc_pp_ctlr *apb_misc = + (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE; struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; struct apb_misc_gp_ctlr *gp = (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE; @@ -135,8 +137,8 @@ int warmboot_save_sdram_params(void) union fbio_spare_reg fbio_spare; /* get ram code that is used as index to array sdram_params in BCT */ - ram_code = (readl(&pmt->pmt_strap_opt_a) >> - STRAP_OPT_A_RAM_CODE_SHIFT) & 3; + ram_code = (readl(&apb_misc->strapping_opt_a) >> + STRAP_OPT_A_RAM_CODE_SHIFT) & 3; memcpy(&sdram, (char *)((struct sdram_params *)SDRAM_PARAMS_BASE + ram_code), sizeof(sdram)); |