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authorStefano Babic <sbabic@denx.de>2014-01-26 12:11:54 +0100
committerStefano Babic <sbabic@denx.de>2014-01-26 12:11:54 +0100
commit707acd01ded3c60a4e277f7c5432d397897b4dfd (patch)
tree5730e1e1f0bac6c1aeddc261cb412fc3d5f220fd /arch/arm/cpu/pxa
parentbe2a3bb39adf1fdd274fc427e30ef62eb86441a1 (diff)
parentc71b4dd2da0dcddabd7c29e6c3dc8a495d4bd928 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/cpu/pxa')
-rw-r--r--arch/arm/cpu/pxa/config.mk13
-rw-r--r--arch/arm/cpu/pxa/timer.c4
2 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk
index d8d263d..f2befbe 100644
--- a/arch/arm/cpu/pxa/config.mk
+++ b/arch/arm/cpu/pxa/config.mk
@@ -14,3 +14,16 @@ PLATFORM_CPPFLAGS += -mcpu=xscale
# ========================================================================
PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
+
+#
+# !WARNING!
+# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from
+# really small OneNAND memories where the mmap'd window is only 1KiB big. The
+# .text.0 contains only the bare minimum needed to load the real SPL into SRAM.
+# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd,
+# they are not discarded.
+#
+
+#ifdef CONFIG_SPL_BUILD
+OBJCFLAGS += -j .text.0 -j .text.1
+#endif
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 78d9f32..c4717de 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -28,12 +28,12 @@ DECLARE_GLOBAL_DATA_PTR;
static unsigned long long tick_to_time(unsigned long long tick)
{
- return tick * CONFIG_SYS_HZ / TIMER_FREQ_HZ;
+ return lldiv(tick * CONFIG_SYS_HZ, TIMER_FREQ_HZ);
}
static unsigned long long us_to_tick(unsigned long long us)
{
- return (us * TIMER_FREQ_HZ) / 1000000;
+ return lldiv(us * TIMER_FREQ_HZ, 1000000);
}
int timer_init(void)