PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

4 files changed, 20 insertions, 20 deletions

diff --git a/arch/arm/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c
index c48b2ef..7727554 100644
--- a/arch/arm/cpu/pxa/cpu.c
+++ b/arch/arm/cpu/pxa/cpu.c
@@ -234,21 +234,21 @@ void pxa_gpio_setup(void)
 	writel(CONFIG_SYS_GPSR0_VAL, GPSR0);
 	writel(CONFIG_SYS_GPSR1_VAL, GPSR1);
 	writel(CONFIG_SYS_GPSR2_VAL, GPSR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 	writel(CONFIG_SYS_GPSR3_VAL, GPSR3);
 #endif
 
 	writel(CONFIG_SYS_GPCR0_VAL, GPCR0);
 	writel(CONFIG_SYS_GPCR1_VAL, GPCR1);
 	writel(CONFIG_SYS_GPCR2_VAL, GPCR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 	writel(CONFIG_SYS_GPCR3_VAL, GPCR3);
 #endif
 
 	writel(CONFIG_SYS_GPDR0_VAL, GPDR0);
 	writel(CONFIG_SYS_GPDR1_VAL, GPDR1);
 	writel(CONFIG_SYS_GPDR2_VAL, GPDR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 	writel(CONFIG_SYS_GPDR3_VAL, GPDR3);
 #endif
 
@@ -258,7 +258,7 @@ void pxa_gpio_setup(void)
 	writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U);
 	writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L);
 	writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 	writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L);
 	writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U);
 #endif
@@ -270,7 +270,7 @@ void pxa_interrupt_setup(void)
 {
 	writel(0, ICLR);
 	writel(0, ICMR);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 	writel(0, ICLR2);
 	writel(0, ICMR2);
 #endif
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 6504819..ba0de8f 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -39,7 +39,7 @@
 #include <config.h>
 #include <version.h>
 
-#ifdef CONFIG_PXA25X
+#ifdef CONFIG_CPU_PXA25X
 #if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800)
 #error "Init SP address must be set to 0xfffff800 for PXA250"
 #endif
@@ -160,7 +160,7 @@ reset:
 	bl  cpu_init_crit
 #endif
 
-#ifdef	CONFIG_PXA250
+#ifdef	CONFIG_CPU_PXA25X
 	bl	lock_cache_for_stack
 #endif
 
@@ -191,7 +191,7 @@ stack_setup:
 	mov	sp, r4
 
 /* Disable the Dcache RAM lock for stack now */
-#ifdef	CONFIG_PXA250
+#ifdef	CONFIG_CPU_PXA25X
 	bl	cpu_init_crit
 #endif
 
@@ -307,7 +307,7 @@ _dynsym_start_ofs:
  *
  *************************************************************************
  */
-#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) || defined(CONFIG_PXA250)
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
 cpu_init_crit:
 	/*
 	 * flush v4 I/D caches
@@ -327,7 +327,7 @@ cpu_init_crit:
 	mcr	p15, 0, r0, c1, c0, 0
 
 	mov	pc, lr		/* back to my caller */
-#endif /* !CONFIG_SKIP_LOWLEVEL_INIT || CONFIG_PXA250 */
+#endif /* !CONFIG_SKIP_LOWLEVEL_INIT || CONFIG_CPU_PXA25X */
 
 #ifndef CONFIG_SPL_BUILD
 /*
@@ -519,7 +519,7 @@ fiq:
  * This is useful on PXA25x and PXA26x in early bootstages, where there is no
  * other possible memory available to hold stack.
  */
-#ifdef CONFIG_PXA250
+#ifdef CONFIG_CPU_PXA25X
 .macro CPWAIT reg
 	mrc	p15, 0, \reg, c2, c0, 0
 	mov	\reg, \reg
@@ -602,4 +602,4 @@ mmutable:
 
 	/* 0xfff00000 : 1:1, cached mapping */
 	.word	(0xfff << 20) | 0x1c1e
-#endif	/* CONFIG_PXA250 */
+#endif	/* CONFIG_CPU_PXA25X */
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 2866745..0ad64dd 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -35,9 +35,9 @@
 #error: interrupts not implemented yet
 #endif
 
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
 #define TIMER_FREQ_HZ 3250000
-#elif defined(CONFIG_PXA250)
+#elif defined(CONFIG_CPU_PXA25X)
 #define TIMER_FREQ_HZ 3686400
 #else
 #error "Timer frequency unknown - please config PXA CPU type"
diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c
index 0311d5e..83022e2 100644
--- a/arch/arm/cpu/pxa/usb.c
+++ b/arch/arm/cpu/pxa/usb.c
@@ -24,7 +24,7 @@
 #include <common.h>
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
-# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
+# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
 
 #include <asm/arch/pxa-regs.h>
 #include <asm/io.h>
@@ -37,7 +37,7 @@ int usb_cpu_init(void)
 	writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
 	udelay(100);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
 	/* Enable USB host clock. */
 	writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
 #endif
@@ -58,7 +58,7 @@ int usb_cpu_init(void)
 #if defined(CONFIG_CPU_MONAHANS)
 	writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
 	writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
 #endif
 	writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
@@ -78,7 +78,7 @@ int usb_cpu_stop(void)
 #if defined(CONFIG_CPU_MONAHANS)
 	writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
 	writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
 #endif
 	writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
@@ -88,7 +88,7 @@ int usb_cpu_stop(void)
 	writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
 	udelay(100);
 #endif
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_CPU_PXA27X)
 	/* Disable USB host clock. */
 	writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 #endif
@@ -101,5 +101,5 @@ int usb_cpu_init_fail(void)
 	return usb_cpu_stop();
 }
 
-# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
+# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
 #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */