arm, spl, at91: add at91sam9260 and at91sam9g45 spl support

add support for using spl code on at91sam9260 and at91sam9g45
based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[adopt Bo's change in spl.c]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

1 files changed, 1 insertions, 94 deletions

diff --git a/arch/arm/cpu/at91-common/spl.c b/arch/arm/cpu/at91-common/spl.c
index 81f5f53..6473320 100644
--- a/arch/arm/cpu/at91-common/spl.c
+++ b/arch/arm/cpu/at91-common/spl.c
@@ -8,89 +8,17 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_wdt.h>
 #include <asm/arch/clk.h>
 #include <spl.h>
 
-static void at91_disable_wdt(void)
+void at91_disable_wdt(void)
 {
 	struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
 
 	writel(AT91_WDT_MR_WDDIS, &wdt->mr);
 }
 
-static void switch_to_main_crystal_osc(void)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 tmp;
-
-	tmp = readl(&pmc->mor);
-	tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
-	tmp &= ~AT91_PMC_MOR_KEY(0xff);
-	tmp |= AT91_PMC_MOR_MOSCEN;
-	tmp |= AT91_PMC_MOR_OSCOUNT(8);
-	tmp |= AT91_PMC_MOR_KEY(0x37);
-	writel(tmp, &pmc->mor);
-	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
-		;
-
-	tmp = readl(&pmc->mor);
-	tmp &= ~AT91_PMC_MOR_OSCBYPASS;
-	tmp &= ~AT91_PMC_MOR_KEY(0xff);
-	tmp |= AT91_PMC_MOR_KEY(0x37);
-	writel(tmp, &pmc->mor);
-
-	tmp = readl(&pmc->mor);
-	tmp |= AT91_PMC_MOR_MOSCSEL;
-	tmp &= ~AT91_PMC_MOR_KEY(0xff);
-	tmp |= AT91_PMC_MOR_KEY(0x37);
-	writel(tmp, &pmc->mor);
-
-	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
-		;
-
-	/* Wait until MAINRDY field is set to make sure main clock is stable */
-	while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
-		;
-
-	tmp = readl(&pmc->mor);
-	tmp &= ~AT91_PMC_MOR_MOSCRCEN;
-	tmp &= ~AT91_PMC_MOR_KEY(0xff);
-	tmp |= AT91_PMC_MOR_KEY(0x37);
-	writel(tmp, &pmc->mor);
-}
-
-void at91_plla_init(u32 pllar)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-
-	writel(pllar, &pmc->pllar);
-	while (!(readl(&pmc->sr) & (AT91_PMC_LOCKA | AT91_PMC_MCKRDY)))
-		;
-}
-
-void at91_mck_init(u32 mckr)
-{
-	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-	u32 tmp;
-
-	tmp = readl(&pmc->mckr);
-	tmp &= ~(AT91_PMC_MCKR_CSS_MASK |
-		 AT91_PMC_MCKR_PRES_MASK |
-		 AT91_PMC_MCKR_MDIV_MASK |
-		 AT91_PMC_MCKR_PLLADIV_2);
-	tmp |= mckr & (AT91_PMC_MCKR_CSS_MASK |
-		       AT91_PMC_MCKR_PRES_MASK |
-		       AT91_PMC_MCKR_MDIV_MASK |
-		       AT91_PMC_MCKR_PLLADIV_2);
-	writel(tmp, &pmc->mckr);
-
-	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
-		;
-}
-
-
 u32 spl_boot_device(void)
 {
 #ifdef CONFIG_SYS_USE_MMC
@@ -116,24 +44,3 @@ u32 spl_boot_mode(void)
 		hang();
 	}
 }
-
-void s_init(void)
-{
-	switch_to_main_crystal_osc();
-
-	/* disable watchdog */
-	at91_disable_wdt();
-
-	/* PMC configuration */
-	at91_pmc_init();
-
-	at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
-
-	timer_init();
-
-	board_early_init_f();
-
-	preloader_console_init();
-
-	mem_init();
-}