diff options
| author | York Sun <yorksun@freescale.com> | 2015-03-20 19:28:08 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-04-23 08:55:55 -0700 |
| commit | 207774b213caa3c72ebd6c9f6d1e4a3a666938b7 (patch) | |
| tree | b0249e1f667a1c607cc1409dfbe7db7fb9b62840 /arch/arm/cpu/armv8/fsl-lsch3/mp.h | |
| parent | 19f9175027b14f11b5a30df17ce76fb6f64dc724 (diff) | |
| download | u-boot-imx-207774b213caa3c72ebd6c9f6d1e4a3a666938b7.zip u-boot-imx-207774b213caa3c72ebd6c9f6d1e4a3a666938b7.tar.gz u-boot-imx-207774b213caa3c72ebd6c9f6d1e4a3a666938b7.tar.bz2 | |
armv8/ls2085a: Fix generic timer clock source
The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-lsch3/mp.h')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-lsch3/mp.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h b/arch/arm/cpu/armv8/fsl-lsch3/mp.h index 66144d6..c985d6a 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/mp.h +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h @@ -26,6 +26,7 @@ #define id_to_core(x) ((x & 3) | (x >> 6)) #ifndef __ASSEMBLY__ extern u64 __spin_table[]; +extern u64 __real_cntfrq; extern u64 *secondary_boot_code; extern size_t __secondary_boot_code_size; int fsl_lsch3_wake_seconday_cores(void); |