Merge branch 'master' of git://git.denx.de/u-boot-samsung

7 files changed, 103 insertions, 40 deletions

diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile
new file mode 100644
index 0000000..37371f6
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -0,0 +1,46 @@
+#
+# Copyright (C) 2009 Samsung Electronics
+# Minkyu Kang <mk7.kang@samsung.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)libs5p-common.a
+
+COBJS-y		+= cpu_info.o
+COBJS-y		+= timer.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS))
+
+all:	 $(obj).depend $(LIB)
+
+$(LIB):	$(OBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
index f16c0ff..2f6c708 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c
+++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
@@ -25,15 +25,14 @@
 #include <asm/arch/clk.h>
 
 /* Default is s5pc100 */
-unsigned int s5pc1xx_cpu_id = 0xC100;
+unsigned int s5p_cpu_id = 0xC100;
 
 #ifdef CONFIG_ARCH_CPU_INIT
 int arch_cpu_init(void)
 {
-	s5pc1xx_cpu_id = readl(S5PC1XX_PRO_ID);
-	s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12);
+	s5p_set_cpu_id();
 
-	s5pc1xx_clock_init();
+	s5p_clock_init();
 
 	return 0;
 }
@@ -41,7 +40,7 @@ int arch_cpu_init(void)
 
 u32 get_device_type(void)
 {
-	return s5pc1xx_cpu_id;
+	return s5p_cpu_id;
 }
 
 #ifdef CONFIG_DISPLAY_CPUINFO
@@ -50,7 +49,7 @@ int print_cpuinfo(void)
 	char buf[32];
 
 	printf("CPU:\tS5P%X@%sMHz\n",
-			s5pc1xx_cpu_id, strmhz(buf, get_arm_clk()));
+			s5p_cpu_id, strmhz(buf, get_arm_clk()));
 
 	return 0;
 }
diff --git a/arch/arm/cpu/armv7/s5pc1xx/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index c5df5c5..0490650 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -44,23 +44,20 @@ static unsigned long long timestamp;	/* Monotonic incrementing timer */
 static unsigned long lastdec;		/* Last decremneter snapshot */
 
 /* macro to read the 16 bit timer */
-static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void)
+static inline struct s5p_timer *s5p_get_base_timer(void)
 {
-	if (cpu_is_s5pc110())
-		return (struct s5pc1xx_timer *)S5PC110_TIMER_BASE;
-	else
-		return (struct s5pc1xx_timer *)S5PC100_TIMER_BASE;
+	return (struct s5p_timer *)samsung_get_base_timer();
 }
 
 int timer_init(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 	u32 val;
 
 	/*
 	 * @ PWM Timer 4
 	 * Timer Freq(HZ) =
-	 *	PCLK / { (prescaler_value + 1) * (divider_value) }
+	 *	PWM_CLK / { (prescaler_value + 1) * (divider_value) }
 	 */
 
 	/* set prescaler : 16 */
@@ -71,7 +68,7 @@ int timer_init(void)
 	if (count_value == 0) {
 		/* reset initial value */
 		/* count_value = 2085937.5(HZ) (per 1 sec)*/
-		count_value = get_pclk() / ((PRESCALER_1 + 1) *
+		count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
 				(MUX_DIV_2 + 1));
 
 		/* count_value / 100 = 20859.375(HZ) (per 10 msec) */
@@ -83,13 +80,13 @@ int timer_init(void)
 	lastdec = count_value;
 
 	val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
-		S5PC1XX_TCON4_AUTO_RELOAD;
+		TCON4_AUTO_RELOAD;
 
 	/* auto reload & manual update */
-	writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon);
+	writel(val | TCON4_UPDATE, &timer->tcon);
 
 	/* start PWM timer 4 */
-	writel(val | S5PC1XX_TCON4_START, &timer->tcon);
+	writel(val | TCON4_START, &timer->tcon);
 
 	timestamp = 0;
 
@@ -154,7 +151,7 @@ void __udelay(unsigned long usec)
 
 void reset_timer_masked(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 
 	/* reset time */
 	lastdec = readl(&timer->tcnto4);
@@ -163,7 +160,7 @@ void reset_timer_masked(void)
 
 unsigned long get_timer_masked(void)
 {
-	struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
+	struct s5p_timer *const timer = s5p_get_base_timer();
 	unsigned long now = readl(&timer->tcnto4);
 
 	if (lastdec >= now)
diff --git a/arch/arm/cpu/armv7/s5pc1xx/Makefile b/arch/arm/cpu/armv7/s5pc1xx/Makefile
index 3785593..263945f 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/Makefile
+++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile
@@ -32,9 +32,7 @@ SOBJS	= cache.o
 SOBJS	+= reset.o
 
 COBJS	+= clock.o
-COBJS	+= cpu_info.o
 COBJS	+= sromc.o
-COBJS	+= timer.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c
index 19619f9..98a27e5 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/clock.c
+++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c
@@ -38,14 +38,16 @@
 #define CONFIG_SYS_CLK_FREQ_C110	24000000
 #endif
 
-unsigned long (*get_pclk)(void);
+unsigned long (*get_uart_clk)(int dev_index);
+unsigned long (*get_pwm_clk)(void);
 unsigned long (*get_arm_clk)(void);
 unsigned long (*get_pll_clk)(int);
 
 /* s5pc110: return pll clock frequency */
 static unsigned long s5pc100_get_pll_clk(int pllreg)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long r, m, p, s, mask, fout;
 	unsigned int freq;
 
@@ -95,7 +97,8 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
 /* s5pc100: return pll clock frequency */
 static unsigned long s5pc110_get_pll_clk(int pllreg)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long r, m, p, s, mask, fout;
 	unsigned int freq;
 
@@ -151,7 +154,8 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
 /* s5pc110: return ARM clock frequency */
 static unsigned long s5pc110_get_arm_clk(void)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long div;
 	unsigned long dout_apll, armclk;
 	unsigned int apll_ratio;
@@ -170,7 +174,8 @@ static unsigned long s5pc110_get_arm_clk(void)
 /* s5pc100: return ARM clock frequency */
 static unsigned long s5pc100_get_arm_clk(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long div;
 	unsigned long dout_apll, armclk;
 	unsigned int apll_ratio, arm_ratio;
@@ -191,7 +196,8 @@ static unsigned long s5pc100_get_arm_clk(void)
 /* s5pc100: return HCLKD0 frequency */
 static unsigned long get_hclk(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long hclkd0;
 	uint div, d0_bus_ratio;
 
@@ -207,7 +213,8 @@ static unsigned long get_hclk(void)
 /* s5pc100: return PCLKD1 frequency */
 static unsigned long get_pclkd1(void)
 {
-	struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc100_clock *clk =
+		(struct s5pc100_clock *)samsung_get_base_clock();
 	unsigned long d1_bus, pclkd1;
 	uint div, d1_bus_ratio, pclkd1_ratio;
 
@@ -227,7 +234,8 @@ static unsigned long get_pclkd1(void)
 /* s5pc110: return HCLKs frequency */
 static unsigned long get_hclk_sys(int dom)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long hclk;
 	unsigned int div;
 	unsigned int offset;
@@ -255,7 +263,8 @@ static unsigned long get_hclk_sys(int dom)
 /* s5pc110: return PCLKs frequency */
 static unsigned long get_pclk_sys(int dom)
 {
-	struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
+	struct s5pc110_clock *clk =
+		(struct s5pc110_clock *)samsung_get_base_clock();
 	unsigned long pclk;
 	unsigned int div;
 	unsigned int offset;
@@ -289,15 +298,33 @@ static unsigned long s5pc100_get_pclk(void)
 	return get_pclkd1();
 }
 
-void s5pc1xx_clock_init(void)
+/* s5pc1xx: return uart clock frequency */
+static unsigned long s5pc1xx_get_uart_clk(int dev_index)
+{
+	if (cpu_is_s5pc110())
+		return s5pc110_get_pclk();
+	else
+		return s5pc100_get_pclk();
+}
+
+/* s5pc1xx: return pwm clock frequency */
+static unsigned long s5pc1xx_get_pwm_clk(void)
+{
+	if (cpu_is_s5pc110())
+		return s5pc110_get_pclk();
+	else
+		return s5pc100_get_pclk();
+}
+
+void s5p_clock_init(void)
 {
 	if (cpu_is_s5pc110()) {
 		get_pll_clk = s5pc110_get_pll_clk;
 		get_arm_clk = s5pc110_get_arm_clk;
-		get_pclk = s5pc110_get_pclk;
 	} else {
 		get_pll_clk = s5pc100_get_pll_clk;
 		get_arm_clk = s5pc100_get_arm_clk;
-		get_pclk = s5pc100_get_pclk;
 	}
+	get_uart_clk = s5pc1xx_get_uart_clk;
+	get_pwm_clk = s5pc1xx_get_pwm_clk;
 }
diff --git a/arch/arm/cpu/armv7/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S
index 7f6ff9c..70fa146 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/reset.S
+++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S
@@ -28,7 +28,7 @@
 
 .globl reset_cpu
 reset_cpu:
-	ldr	r1, =S5PC1XX_PRO_ID
+	ldr	r1, =S5PC100_PRO_ID
 	ldr	r2, [r1]
 	ldr	r4, =0x00010000
 	and	r4, r2, r4
diff --git a/arch/arm/cpu/armv7/s5pc1xx/sromc.c b/arch/arm/cpu/armv7/s5pc1xx/sromc.c
index 380be81..044d122 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/sromc.c
+++ b/arch/arm/cpu/armv7/s5pc1xx/sromc.c
@@ -35,12 +35,8 @@
 void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
 {
 	u32 tmp;
-	struct s5pc1xx_smc *srom;
-
-	if (cpu_is_s5pc100())
-		srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
-	else
-		srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
+	struct s5pc1xx_smc *srom =
+		(struct s5pc1xx_smc *)samsung_get_base_sromc();
 
 	/* Configure SMC_BW register to handle proper SROMC bank */
 	tmp = srom->bw;