diff options
author | Tom Warren <twarren.nvidia@gmail.com> | 2011-01-27 10:58:05 +0000 |
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committer | Albert Aribaud <albert.aribaud@free.fr> | 2011-02-21 08:30:54 +0100 |
commit | 3f82b1d3abf492038e14237f9c89bd55c31770ad (patch) | |
tree | 8bbff8ff342edace852b851f10d4e8d835bd8e96 /arch/arm/cpu/armv7 | |
parent | 9b6442f99c617f147b95d9844a492c429e16e23c (diff) | |
download | u-boot-imx-3f82b1d3abf492038e14237f9c89bd55c31770ad.zip u-boot-imx-3f82b1d3abf492038e14237f9c89bd55c31770ad.tar.gz u-boot-imx-3f82b1d3abf492038e14237f9c89bd55c31770ad.tar.bz2 |
arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/Makefile | 48 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/board.c | 88 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/config.mk | 28 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/lowlevel_init.S | 65 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/sys_info.c | 35 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/tegra2/timer.c | 122 |
6 files changed, 386 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/Makefile b/arch/arm/cpu/armv7/tegra2/Makefile new file mode 100644 index 0000000..687c887 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2010,2011 Nvidia Corporation. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +SOBJS := lowlevel_init.o +COBJS := board.o sys_info.o timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c new file mode 100644 index 0000000..9061d18 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/tegra2.h> +#include <asm/arch/pmc.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Boot ROM initializes the odmdata in APBDEV_PMC_SCRATCH20_0, + * so we are using this value to identify memory size. + */ + +unsigned int query_sdram_size(void) +{ + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + u32 reg; + + reg = readl(&pmc->pmc_scratch20); + debug("pmc->pmc_scratch20 (ODMData) = 0x%08lX\n", reg); + + /* bits 31:28 in OdmData are used for RAM size */ + switch ((reg) >> 28) { + case 1: + return 0x10000000; /* 256 MB */ + case 2: + return 0x20000000; /* 512 MB */ + case 3: + default: + return 0x40000000; /* 1GB */ + } +} + +void s_init(void) +{ +#ifndef CONFIG_ICACHE_OFF + icache_enable(); +#endif + invalidate_dcache(); +} + +int dram_init(void) +{ + unsigned long rs; + + /* We do not initialise DRAM here. We just query the size */ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = gd->ram_size = query_sdram_size(); + + /* Now check it dynamically */ + rs = get_ram_size(CONFIG_SYS_SDRAM_BASE, gd->ram_size); + if (rs) { + printf("dynamic ram_size = %lu\n", rs); + gd->bd->bi_dram[0].size = gd->ram_size = rs; + } + return 0; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ + printf("Board: %s\n", sysinfo.board_string); + return 0; +} +#endif /* CONFIG_DISPLAY_BOARDINFO */ diff --git a/arch/arm/cpu/armv7/tegra2/config.mk b/arch/arm/cpu/armv7/tegra2/config.mk new file mode 100644 index 0000000..96c0795 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation <www.nvidia.com> +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# Use ARMv4 for Tegra2 - initial code runs on the AVP, which is an ARM7TDI. +PLATFORM_CPPFLAGS += -march=armv4 diff --git a/arch/arm/cpu/armv7/tegra2/lowlevel_init.S b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S new file mode 100644 index 0000000..7f15746 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/lowlevel_init.S @@ -0,0 +1,65 @@ +/* + * SoC-specific setup info + * + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + +_TEXT_BASE: + .word CONFIG_SYS_TEXT_BASE @ sdram load addr from config file + +.global invalidate_dcache +invalidate_dcache: + mov pc, lr + + .align 5 +.global reset_cpu +reset_cpu: + ldr r1, rstctl @ get addr for global reset + @ reg + ldr r3, [r1] + orr r3, r3, #0x10 + str r3, [r1] @ force reset + mov r0, r0 +_loop_forever: + b _loop_forever +rstctl: + .word PRM_RSTCTRL + +.globl lowlevel_init +lowlevel_init: + ldr sp, SRAM_STACK + str ip, [sp] + mov ip, lr + bl s_init @ go setup pll, mux & memory + ldr ip, [sp] + mov lr, ip + + mov pc, lr @ back to arch calling code + + @ the literal pools origin + .ltorg + +SRAM_STACK: + .word LOW_LEVEL_SRAM_STACK diff --git a/arch/arm/cpu/armv7/tegra2/sys_info.c b/arch/arm/cpu/armv7/tegra2/sys_info.c new file mode 100644 index 0000000..6d11dc1 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/sys_info.c @@ -0,0 +1,35 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#ifdef CONFIG_DISPLAY_CPUINFO +/* Print CPU information */ +int print_cpuinfo(void) +{ + puts("TEGRA2\n"); + + /* TBD: Add printf of major/minor rev info, stepping, etc. */ + return 0; +} +#endif /* CONFIG_DISPLAY_CPUINFO */ diff --git a/arch/arm/cpu/armv7/tegra2/timer.c b/arch/arm/cpu/armv7/tegra2/timer.c new file mode 100644 index 0000000..fb061d0 --- /dev/null +++ b/arch/arm/cpu/armv7/tegra2/timer.c @@ -0,0 +1,122 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * (C) Copyright 2008 + * Texas Instruments + * + * Richard Woodruff <r-woodruff2@ti.com> + * Syed Moahmmed Khasim <khasim@ti.com> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * Alex Zuepke <azu@sysgo.de> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra2.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE; + +/* counter runs at 1MHz */ +#define TIMER_CLK (1000000) +#define TIMER_LOAD_VAL 0xffffffff + +/* timer without interrupts */ +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void set_timer(ulong t) +{ + gd->tbl = t; +} + +/* delay x useconds */ +void __udelay(unsigned long usec) +{ + long tmo = usec * (TIMER_CLK / 1000) / 1000; + unsigned long now, last = readl(&timer_base->cntr_1us); + + while (tmo > 0) { + now = readl(&timer_base->cntr_1us); + if (last > now) /* count up timer overflow */ + tmo -= TIMER_LOAD_VAL - last + now; + else + tmo -= now - last; + last = now; + } +} + +void reset_timer_masked(void) +{ + /* reset time, capture current incrementer value time */ + gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ); + gd->tbl = 0; /* start "advancing" time stamp from 0 */ +} + +ulong get_timer_masked(void) +{ + ulong now; + + /* current tick value */ + now = readl(&timer_base->cntr_1us) / (TIMER_CLK / CONFIG_SYS_HZ); + + if (now >= gd->lastinc) /* normal mode (non roll) */ + /* move stamp forward with absolute diff ticks */ + gd->tbl += (now - gd->lastinc); + else /* we have rollover of incrementer */ + gd->tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ)) + - gd->lastinc) + now; + gd->lastinc = now; + return gd->tbl; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} |