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| author | Andre Renaud <andre@bluewatersys.com> | 2014-06-10 08:47:13 +1200 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2014-07-15 18:50:12 +0800 |
| commit | d7299ad754bb27c037fdd40c404c9d81afaeadc3 (patch) | |
| tree | 94bed74d2c67b34ea9c0e2e8a27f861201febdb1 /arch/arm/cpu/armv7 | |
| parent | a040e7960113295565b6c5f614069bd36279650c (diff) | |
| download | u-boot-imx-d7299ad754bb27c037fdd40c404c9d81afaeadc3.zip u-boot-imx-d7299ad754bb27c037fdd40c404c9d81afaeadc3.tar.gz u-boot-imx-d7299ad754bb27c037fdd40c404c9d81afaeadc3.tar.bz2 | |
MX6: Correct calculation of PLL_SYS
DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
(cherry picked from commit 2eb268f6fd236a5ad9d51e7e47190d7994b3920f)
Diffstat (limited to 'arch/arm/cpu/armv7')
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index eed413d..abe2d81 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -80,7 +80,7 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) div = __raw_readl(&imx_ccm->analog_pll_sys); div &= BM_ANADIG_PLL_SYS_DIV_SELECT; - return infreq * (div >> 1); + return (infreq * div) >> 1; case PLL_BUS: div = __raw_readl(&imx_ccm->analog_pll_528); div &= BM_ANADIG_PLL_528_DIV_SELECT; |