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authorYe.Li <B37916@freescale.com>2014-09-16 17:38:46 +0800
committerYe.Li <B37916@freescale.com>2014-09-18 11:10:56 +0800
commit1c6f3b6ec717bdf7e6a26996e399e050f66abcce (patch)
tree2436482d0258ee762d987f88050a71380f1aa623 /arch/arm/cpu/armv7
parent073fa27266c969d9cf4f5bc7fb8c8a5441759f99 (diff)
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ENGR00331706-3 imx: mx6: Change the get_ipg_per_clk for OSC 24Mhz source
For MX6SL and MX6SX, the perclk can come from OSC 24Mhz source. Fix the get_ipg_per_clk function to support it. Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 0c6abbc..9c6838f 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -204,6 +204,10 @@ static u32 get_ipg_per_clk(void)
u32 reg, perclk_podf;
reg = __raw_readl(&imx_ccm->cscmr1);
+#if (defined(CONFIG_MX6SL) || defined(CONFIG_MX6SX))
+ if (reg & MXC_CCM_CSCMR1_PER_CLK_SEL_MASK)
+ return MXC_HCLK; /* OSC 24Mhz */
+#endif
perclk_podf = reg & MXC_CCM_CSCMR1_PERCLK_PODF_MASK;
return get_ipg_clk() / (perclk_podf + 1);