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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-03-26 09:51:09 +0100 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-03-26 09:51:09 +0100 |
commit | 412665b46134f93464c09405e02f08ac9c62526d (patch) | |
tree | 7d45bfd311e81d2d750c0c67edef17ceba17df3f /arch/arm/cpu/armv7 | |
parent | b6379e15a70cc2e22486e5962927d9de374d877b (diff) | |
parent | ce0c1bc13556fbf1bdfa2a4a27ca6744e7beb32a (diff) | |
download | u-boot-imx-412665b46134f93464c09405e02f08ac9c62526d.zip u-boot-imx-412665b46134f93464c09405e02f08ac9c62526d.tar.gz u-boot-imx-412665b46134f93464c09405e02f08ac9c62526d.tar.bz2 |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/exynos/power.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index d4bce6d..6375a81 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -95,3 +95,48 @@ void set_dp_phy_ctrl(unsigned int enable) if (cpu_is_exynos5()) exynos5_dp_phy_control(enable); } + +static void exynos5_set_ps_hold_ctrl(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* Set PS-Hold high */ + setbits_le32(&power->ps_hold_control, + EXYNOS_PS_HOLD_CONTROL_DATA_HIGH); +} + +void set_ps_hold_ctrl(void) +{ + if (cpu_is_exynos5()) + exynos5_set_ps_hold_ctrl(); +} + + +static void exynos5_set_xclkout(void) +{ + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* use xxti for xclk out */ + clrsetbits_le32(&power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK, + PMU_DEBUG_XXTI); +} + +void set_xclkout(void) +{ + if (cpu_is_exynos5()) + exynos5_set_xclkout(); +} + +/* Enables hardware tripping to power off the system when TMU fails */ +void set_hw_thermal_trip(void) +{ + if (cpu_is_exynos5()) { + struct exynos5_power *power = + (struct exynos5_power *)samsung_get_base_power(); + + /* PS_HOLD_CONTROL register ENABLE_HW_TRIP bit*/ + setbits_le32(&power->ps_hold_control, POWER_ENABLE_HW_TRIP); + } +} |