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author | Keerthy <j-keerthy@ti.com> | 2016-09-14 10:43:32 +0530 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-10-06 20:58:16 -0400 |
commit | d31d4a2d7523c73b5da03a1697b6438e1fe1b027 (patch) | |
tree | 1bfe4392313b45845b4e4abae169f3f611852138 /arch/arm/cpu/armv7 | |
parent | 60d42e9d519857921118b91c23a0062935c9d085 (diff) | |
download | u-boot-imx-d31d4a2d7523c73b5da03a1697b6438e1fe1b027.zip u-boot-imx-d31d4a2d7523c73b5da03a1697b6438e1fe1b027.tar.gz u-boot-imx-d31d4a2d7523c73b5da03a1697b6438e1fe1b027.tar.bz2 |
ARM: Introduce function to switch to hypervisor mode
On some of the SoCs one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader. Hence introduce a weak function which can be
overridden based on the SoC type and switch to hypervisor mode in a
custom way.
Cc: beagleboard-x15@googlegroups.com
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/start.S | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 691e5d3..7eee54b 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -17,6 +17,7 @@ #include <config.h> #include <asm/system.h> #include <linux/linkage.h> +#include <asm/armv7.h> /************************************************************************* * @@ -30,11 +31,24 @@ .globl reset .globl save_boot_params_ret +#ifdef CONFIG_ARMV7_LPAE + .global switch_to_hypervisor_ret +#endif reset: /* Allow the board to save important registers */ b save_boot_params save_boot_params_ret: +#ifdef CONFIG_ARMV7_LPAE +/* + * check for Hypervisor support + */ + mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 + and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits + cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT) + beq switch_to_hypervisor +switch_to_hypervisor_ret: +#endif /* * disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode, * except if in HYP mode already @@ -103,6 +117,13 @@ ENTRY(save_boot_params) ENDPROC(save_boot_params) .weak save_boot_params +#ifdef CONFIG_ARMV7_LPAE +ENTRY(switch_to_hypervisor) + b switch_to_hypervisor_ret +ENDPROC(switch_to_hypervisor) + .weak switch_to_hypervisor +#endif + /************************************************************************* * * cpu_init_cp15 |