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author | Stefano Babic <sbabic@denx.de> | 2016-03-20 22:04:29 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2016-03-20 22:04:29 +0100 |
commit | 312a6c016a2d81aa3fbc605f5c0c315b6a4e3464 (patch) | |
tree | 3b7675802858da0878f6d8713b4d032696a96880 /arch/arm/cpu/armv7 | |
parent | e4fb863f6dec0002069d57422ebe3ce3af69a273 (diff) | |
parent | e25a0656bac63c5fcd20ef4313dc09c409fc512d (diff) | |
download | u-boot-imx-312a6c016a2d81aa3fbc605f5c0c315b6a4e3464.zip u-boot-imx-312a6c016a2d81aa3fbc605f5c0c315b6a4e3464.tar.gz u-boot-imx-312a6c016a2d81aa3fbc605f5c0c315b6a4e3464.tar.bz2 |
Merge branch 'next'
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/mx6/Kconfig | 13 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx7/soc.c | 18 |
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index c72a150..dc0894a 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -60,6 +60,18 @@ config TARGET_CM_FX6 config TARGET_EMBESTMX6BOARDS bool "embestmx6boards" +config TARGET_GE_B450V3 + bool "General Electric B450v3" + select MX6Q + +config TARGET_GE_B650V3 + bool "General Electric B650v3" + select MX6Q + +config TARGET_GE_B850V3 + bool "General Electric B850v3" + select MX6Q + config TARGET_GW_VENTANA bool "gw_ventana" select SUPPORT_SPL @@ -158,6 +170,7 @@ endchoice config SYS_SOC default "mx6" +source "board/ge/bx50v3/Kconfig" source "board/aristainetos/Kconfig" source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index ba6cfb9..073bbc6 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -165,6 +165,21 @@ u32 get_cpu_temp_grade(int *minc, int *maxc) return val; } +static bool is_mx7d(void) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + int val; + + val = readl(&fuse->tester4); + if (val & 1) + return false; + else + return true; +} + u32 get_cpu_rev(void) { struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) @@ -172,6 +187,9 @@ u32 get_cpu_rev(void) u32 reg = readl(&ccm_anatop->digprog); u32 type = (reg >> 16) & 0xff; + if (!is_mx7d()) + type = MXC_CPU_MX7S; + reg &= 0xff; return (type << 12) | reg; } |