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author | SRICHARAN R <r.sricharan@ti.com> | 2012-03-12 19:49:32 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:25 +0200 |
commit | d417d1db5f9092d125ddea882ced77eaa5f3d236 (patch) | |
tree | ec72ff4c943c45f439a8bfb0949294387da50dbd /arch/arm/cpu/armv7 | |
parent | 328aecaf3dbca4eea31632a5bfddf38b63204227 (diff) | |
download | u-boot-imx-d417d1db5f9092d125ddea882ced77eaa5f3d236.zip u-boot-imx-d417d1db5f9092d125ddea882ced77eaa5f3d236.tar.gz u-boot-imx-d417d1db5f9092d125ddea882ced77eaa5f3d236.tar.bz2 |
OMAP3+: reset: Create a common reset layer.
The reset.S has the function to do a warm reset on OMAP
based socs. Moving this to a reset.c file so that this
acts a common layer to add any reset related functionality
for the future.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/reset.c (renamed from arch/arm/cpu/armv7/omap-common/reset.S) | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/reset.S b/arch/arm/cpu/armv7/omap-common/reset.c index 838b122..234e90a 100644 --- a/arch/arm/cpu/armv7/omap-common/reset.S +++ b/arch/arm/cpu/armv7/omap-common/reset.c @@ -1,6 +1,11 @@ /* - * Copyright (c) 2009 Samsung Electronics. - * Minkyu Kang <mk7.kang@samsung.com> + * + * Common layer for reset related functionality of OMAP based socs. + * + * (C) Copyright 2012 + * Texas Instruments, <www.ti.com> + * + * Sricharan R <r.sricharan@ti.com> * * See file CREDITS for list of people who contributed to this * project. @@ -20,19 +25,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ - #include <config.h> +#include <asm/io.h> +#include <asm/arch/cpu.h> +#include <linux/compiler.h> -.global reset_cpu -reset_cpu: - ldr r1, rstctl @ get addr for global reset - @ reg - ldr r3, rstbit @ sw reset bit - str r3, [r1] @ force reset - mov r0, r0 -_loop_forever: - b _loop_forever -rstctl: - .word PRM_RSTCTRL -rstbit: - .word PRM_RSTCTRL_RESET +void __weak reset_cpu(unsigned long ignored) +{ + writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); +} |