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authorChandan Nath <chandan.nath@ti.com>2012-07-24 12:22:17 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:11 +0200
commite79cd8eb9bc47b6bb40e5948c71a00785f764257 (patch)
tree12049aa66b453d460af3884368ed21d11ae97eb4 /arch/arm/cpu/armv7
parent2b62997ce931494da3f5836899a91ae3909a0c0c (diff)
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am33xx: CPSW init and definitions
This patch adds platform-specific initialization for CPSW switch on TI AM33XX SoCs. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split init out of original patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
Diffstat (limited to 'arch/arm/cpu/armv7')
-rw-r--r--arch/arm/cpu/armv7/am33xx/clock.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c
index 16beb4f..e3c4fd8 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -24,6 +24,7 @@
#define PRCM_MOD_EN 0x2
#define PRCM_FORCE_WAKEUP 0x2
+#define PRCM_FUNCTL 0x0
#define PRCM_EMIF_CLK_ACTIVITY BIT(2)
#define PRCM_L3_GCLK_ACTIVITY BIT(4)
@@ -38,7 +39,7 @@
#define CLK_MODE_SEL 0x7
#define CLK_MODE_MASK 0xfffffff8
#define CLK_DIV_SEL 0xFFFFFFE0
-
+#define CPGMAC0_IDLE 0x30000
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
@@ -138,6 +139,11 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, &cmper->i2c1clkctrl);
while (readl(&cmper->i2c1clkctrl) != PRCM_MOD_EN)
;
+
+ /* Ethernet */
+ writel(PRCM_MOD_EN, &cmper->cpgmac0clkctrl);
+ while ((readl(&cmper->cpgmac0clkctrl) & CPGMAC0_IDLE) != PRCM_FUNCTL)
+ ;
}
static void mpu_pll_config(void)