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| author | Simon Glass <sjg@chromium.org> | 2011-11-05 03:56:53 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-09 17:30:09 +0100 |
| commit | e75119d27838cab20c71605369baff2bfdbd4b0c (patch) | |
| tree | cb73a82664acabeb283ce4b7b1faa05de6ffe0bd /arch/arm/cpu/armv7/tegra2/ap20.h | |
| parent | 831a077f11869dfc33ca2316a4bdeba203e8ce60 (diff) | |
| download | u-boot-imx-e75119d27838cab20c71605369baff2bfdbd4b0c.zip u-boot-imx-e75119d27838cab20c71605369baff2bfdbd4b0c.tar.gz u-boot-imx-e75119d27838cab20c71605369baff2bfdbd4b0c.tar.bz2 | |
tegra2: Remove unneeded boot code
Since we have cache support built in we can remove Tegra's existing cache
initialization code amd other related dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/armv7/tegra2/ap20.h')
| -rw-r--r-- | arch/arm/cpu/armv7/tegra2/ap20.h | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.h b/arch/arm/cpu/armv7/tegra2/ap20.h index 1bb48d6..a4b4d73 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.h +++ b/arch/arm/cpu/armv7/tegra2/ap20.h @@ -95,13 +95,8 @@ #define HALT_COP_EVENT_IRQ_1 (1 << 11) #define HALT_COP_EVENT_FIQ_1 (1 << 9) -/* Prototypes */ - +/* Start up the tegra2 SOC */ void tegra2_start(void); -void uart_init(void); -void udelay(unsigned long); -void cold_boot(void); -void cache_configure(void); /* This is the main entry into U-Boot, used by the Cortex-A9 */ extern void _start(void); |