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author | Peng Fan <Peng.Fan@freescale.com> | 2014-09-04 11:21:29 +0800 |
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committer | Peng Fan <Peng.Fan@freescale.com> | 2014-09-05 09:20:16 +0800 |
commit | 0338ad3a375c4809abde523d9adfd689cc1f83cf (patch) | |
tree | c37f46c40c125ec45dfaabd4644c04e2fcf840b5 /arch/arm/cpu/armv7/syslib.c | |
parent | 69f56f7509a4116fa0f2b9be50db256f1e628d31 (diff) | |
download | u-boot-imx-0338ad3a375c4809abde523d9adfd689cc1f83cf.zip u-boot-imx-0338ad3a375c4809abde523d9adfd689cc1f83cf.tar.gz u-boot-imx-0338ad3a375c4809abde523d9adfd689cc1f83cf.tar.bz2 |
ENGR00329484-1 QuadSPI:Unaligned access crash uboot
To fsl_qspi_write_data and fsl_qspi_ip_read, pointer txbuf and
rxbuf are not guaranteed that they are 4 Bytes aligned. Also,
it it not a good idea to cast type 'u8 *' to 'u32 *', except
we are sure that pointer type 'u8 *' is 4 Bytes aligned and
cast it to 'u32 *' will not pass memory boundary.
The problem is found when using fsl_qspi_write_data to write
registers in flash devices. The err msg:
data abort
pc : [<87822f44>] lr : [<87822f38>]
sp : bf5512c8 ip : 0000001c fp : bf856608
r10: 87868904 r9 : bf551efc r8 : 200f048c
r7 : 00000002 r6 : bf551336 r5 : bf552a70 r4 : 00000001
r3 : 00000000 r2 : 00000060 r1 : 8783b520 r0 : 8783b520
Flags: nZCv IRQs on FIQs off Mode SVC_32
Resetting CPU ...
The asm code which cause data abort is:
87822f30: e5964000 ldr r4, [r6]
From the dump msg, r6 is not 4 Bytes aligned, and data abort exception.
So, Use mempcy but not unsafe type casting.
In this patch, max_write_size is assigned using txfifo to avoid possible
errors in future.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/syslib.c')
0 files changed, 0 insertions, 0 deletions