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author | Chen-Yu Tsai <wens@csie.org> | 2014-10-22 16:47:47 +0800 |
---|---|---|
committer | Hans de Goede <hdegoede@redhat.com> | 2014-10-24 09:35:39 +0200 |
commit | c757a50bd12b4f4f1c44a7cc42354918e8d60cd7 (patch) | |
tree | f7041a6dc6cbb8bc45372c633bc978a54becdf68 /arch/arm/cpu/armv7/sunxi | |
parent | 472ed0641e73ea5c5b80f9bfa804bfe0f89eca69 (diff) | |
download | u-boot-imx-c757a50bd12b4f4f1c44a7cc42354918e8d60cd7.zip u-boot-imx-c757a50bd12b4f4f1c44a7cc42354918e8d60cd7.tar.gz u-boot-imx-c757a50bd12b4f4f1c44a7cc42354918e8d60cd7.tar.bz2 |
ARM: sunxi: Add support for using R_UART as console
The A23 only has UART0 muxed with MMC0. Some of the boards we
encountered expose R_UART as a set of pads.
Add support for R_UART so we can have a console while using mmc.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'arch/arm/cpu/armv7/sunxi')
-rw-r--r-- | arch/arm/cpu/armv7/sunxi/board.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 6 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 134a198..06eb676 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -75,6 +75,10 @@ int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_SUN8I) + sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL2_R_UART_TX); + sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL3_R_UART_RX); + sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); #else #error Unsupported console port number. Please fix pin mux settings in board.c #endif diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c index 8387b93..1eae976 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c @@ -13,6 +13,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> +#include <asm/arch/prcm.h> #include <asm/arch/sys_proto.h> void clock_init_uart(void) @@ -20,6 +21,7 @@ void clock_init_uart(void) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; +#if CONFIG_CONS_INDEX < 5 /* uart clock source is apb2 */ writel(APB2_CLK_SRC_OSC24M| APB2_CLK_RATE_N_1| @@ -35,6 +37,10 @@ void clock_init_uart(void) setbits_le32(&ccm->apb2_reset_cfg, 1 << (APB2_RESET_UART_SHIFT + CONFIG_CONS_INDEX - 1)); +#else + /* enable R_PIO and R_UART clocks, and de-assert resets */ + prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART); +#endif /* Dup with clock_init_safe(), drop once sun6i SPL support lands */ writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); |