Merge branch 'master' of git://git.denx.de/u-boot-arm

1 files changed, 8 insertions, 122 deletions

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 64c86e9..bb3948d 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -29,6 +29,7 @@
  * MA 02111-1307 USA
  */
 
+#include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
 
@@ -69,12 +70,6 @@ _end_vect:
 _TEXT_BASE:
 	.word	CONFIG_SYS_TEXT_BASE
 
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
-	.word _start
-#endif
-
 /*
  * These are defined in the board-specific linker script.
  */
@@ -98,7 +93,6 @@ FIQ_STACK_START:
 	.word 0x0badc0de
 #endif
 
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 .globl IRQ_STACK_START_IN
 IRQ_STACK_START_IN:
@@ -195,7 +189,6 @@ relocate_code:
 stack_setup:
 	mov	sp, r4
 
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
 	adr	r0, _start
 	ldr	r2, _TEXT_BASE
 	ldr	r3, _bss_start_ofs
@@ -224,13 +217,13 @@ copy_loop:
 	ldr	r3, _rel_dyn_end_ofs	/* r3 <- rel dyn end ofs */
 	add	r3, r3, r0		/* r3 <- rel dyn end in FLASH */
 fixloop:
-	ldr	r0, [r2]	/* r0 <- location to fix up, IN FLASH! */
-	add	r0, r9		/* r0 <- location to fix up in RAM */
+	ldr	r0, [r2]		/* r0 <- location to fix up, IN FLASH! */
+	add	r0, r0, r9		/* r0 <- location to fix up in RAM */
 	ldr	r1, [r2, #4]
 	and	r8, r1, #0xff
-	cmp	r8, #23		/* relative fixup? */
+	cmp	r8, #23			/* relative fixup? */
 	beq	fixrel
-	cmp	r8, #2		/* absolute fixup? */
+	cmp	r8, #2			/* absolute fixup? */
 	beq	fixabs
 	/* ignore unknown type of fixup */
 	b	fixnext
@@ -247,7 +240,7 @@ fixrel:
 	add	r1, r1, r9
 fixnext:
 	str	r1, [r0]
-	add	r2, r2, #8	/* each rel.dyn entry is 8 bytes */
+	add	r2, r2, #8		/* each rel.dyn entry is 8 bytes */
 	cmp	r2, r3
 	blo	fixloop
 
@@ -265,7 +258,6 @@ clbss_l:str	r2, [r0]		/* clear loop...		    */
 	cmp	r0, r1
 	bne	clbss_l
 #endif	/* #ifndef CONFIG_PRELOADER */
-#endif	/* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
 
 /*
  * We are done. Do not return, instead branch to second part of board
@@ -274,8 +266,8 @@ clbss_l:str	r2, [r0]		/* clear loop...		    */
 jump_2_ram:
 	ldr	r0, _board_init_r_ofs
 	adr	r1, _start
-	add	r0, r0, r1
-	add	lr, r0, r9
+	add	lr, r0, r1
+	add	lr, lr, r9
 	/* setup parameters for board_init_r */
 	mov	r0, r5		/* gd_t */
 	mov	r1, r7		/* dest_addr */
@@ -292,94 +284,6 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
 	.word __dynsym_start - _start
 
-#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-/*
- * the actual reset code
- */
-
-reset:
-	/*
-	 * set the cpu to SVC32 mode
-	 */
-	mrs	r0, cpsr
-	bic	r0, r0, #0x1f
-	orr	r0, r0, #0xd3
-	msr	cpsr,r0
-
-#if (CONFIG_OMAP34XX)
-	/* Copy vectors to mask ROM indirect addr */
-	adr	r0, _start		@ r0 <- current position of code
-	add	r0, r0, #4		@ skip reset vector
-	mov	r2, #64			@ r2 <- size to copy
-	add	r2, r0, r2		@ r2 <- source end address
-	mov	r1, #SRAM_OFFSET0	@ build vect addr
-	mov	r3, #SRAM_OFFSET1
-	add	r1, r1, r3
-	mov	r3, #SRAM_OFFSET2
-	add	r1, r1, r3
-next:
-	ldmia	r0!, {r3 - r10}		@ copy from source address [r0]
-	stmia	r1!, {r3 - r10}		@ copy to   target address [r1]
-	cmp	r0, r2			@ until source end address [r2]
-	bne	next			@ loop until equal */
-#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
-	/* No need to copy/exec the clock code - DPLL adjust already done
-	 * in NAND/oneNAND Boot.
-	 */
-	bl	cpy_clk_code		@ put dpll adjust code behind vectors
-#endif /* NAND Boot */
-#endif
-	/* the mask ROM code should have PLL and others stable */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-	bl	cpu_init_crit
-#endif
-
-#ifndef CONFIG_SKIP_RELOCATE_UBOOT
-relocate:				@ relocate U-Boot to RAM
-	adr	r0, _start		@ r0 <- current position of code
-	ldr	r1, _TEXT_BASE		@ test if we run from flash or RAM
-	cmp	r0, r1			@ don't reloc during debug
-	beq	stack_setup
-
-	ldr	r2, _armboot_start
-	ldr	r3, _bss_start
-	sub	r2, r3, r2		@ r2 <- size of armboot
-	add	r2, r0, r2		@ r2 <- source end address
-
-copy_loop:				@ copy 32 bytes at a time
-	ldmia	r0!, {r3 - r10}		@ copy from source address [r0]
-	stmia	r1!, {r3 - r10}		@ copy to   target address [r1]
-	cmp	r0, r2			@ until source end address [r2]
-	blo	copy_loop
-#endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
-
-	/* Set up the stack */
-stack_setup:
-	ldr	r0, _TEXT_BASE		@ upper 128 KiB: relocated uboot
-	sub	r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area
-	sub	r0, r0, #CONFIG_SYS_GBL_DATA_SIZE @ bdinfo
-#ifdef CONFIG_USE_IRQ
-	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ)
-#endif
-	sub	sp, r0, #12		@ leave 3 words for abort-stack
-	bic	sp, sp, #7		@ 8-byte alignment for ABI compliance
-
-	/* Clear BSS (if any). Is below tx (watch load addr - need space) */
-clear_bss:
-	ldr	r0, _bss_start		@ find start of bss segment
-	ldr	r1, _bss_end		@ stop here
-	mov	r2, #0x00000000		@ clear value
-clbss_l:
-	str	r2, [r0]		@ clear BSS location
-	cmp	r0, r1			@ are we at the end yet
-	add	r0, r0, #4		@ increment clear index pointer
-	bne	clbss_l			@ keep clearing till at end
-
-	ldr	pc, _start_armboot	@ jump to C code
-
-_start_armboot: .word start_armboot
-#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
-
 /*************************************************************************
  *
  * CPU_init_critical registers
@@ -461,14 +365,8 @@ cpu_init_crit:
 						@ user stack
 	stmia	sp, {r0 - r12}			@ Save user registers (now in
 						@ svc mode) r0-r12
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-	ldr	r2, _armboot_start
-	sub	r2, r2, #(CONFIG_SYS_MALLOC_LEN)
-	sub	r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE + 8)	@ set base 2 words into abort
-#else
 	ldr	r2, IRQ_STACK_START_IN		@ set base 2 words into abort
 						@ stack
-#endif
 	ldmia	r2, {r2 - r3}			@ get values for "aborted" pc
 						@ and cpsr (into parm regs)
 	add	r0, sp, #S_FRAME_SIZE		@ grab pointer to old stack
@@ -504,14 +402,8 @@ cpu_init_crit:
 	.endm
 
 	.macro get_bad_stack
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-	ldr	r13, _armboot_start		@ setup our mode stack (enter
-	sub	r13, r13, #(CONFIG_SYS_MALLOC_LEN)	@ move past malloc pool
-	sub	r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ move to reserved a couple
-#else
 	ldr	r13, IRQ_STACK_START_IN		@ setup our mode stack (enter
 						@ in banked mode)
-#endif
 
 	str	lr, [r13]			@ save caller lr in position 0
 						@ of saved stack
@@ -532,14 +424,8 @@ cpu_init_crit:
 	sub	r13, r13, #4			@ space on current stack for
 						@ scratch reg.
 	str	r0, [r13]			@ save R0's value.
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-	ldr	r0, _armboot_start		@ get data regions start
-	sub	r0, r0, #(CONFIG_SYS_MALLOC_LEN)	@ move past malloc pool
-	sub	r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8)	@ move past gbl and a couple
-#else
 	ldr	r0, IRQ_STACK_START_IN		@ get data regions start
 						@ spots for abort stack
-#endif
 	str	lr, [r0]			@ save caller lr in position 0
 						@ of saved stack
 	mrs	r0, spsr			@ get the spsr