diff options
author | Aneesh V <aneesh@ti.com> | 2011-07-21 09:10:21 -0400 |
---|---|---|
committer | U-Boot <uboot@aari01-12.(none)> | 2011-08-03 12:49:20 +0200 |
commit | bcae72116257201d7288cb8c525a29aea4875b95 (patch) | |
tree | 27511a4f1475382047a803b50883416ae87b144c /arch/arm/cpu/armv7/omap4 | |
parent | 033ca72438635c68f3940216a550217b9e7f6417 (diff) | |
download | u-boot-imx-bcae72116257201d7288cb8c525a29aea4875b95.zip u-boot-imx-bcae72116257201d7288cb8c525a29aea4875b95.tar.gz u-boot-imx-bcae72116257201d7288cb8c525a29aea4875b95.tar.bz2 |
omap: add basic SPL support
- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap4')
-rw-r--r-- | arch/arm/cpu/armv7/omap4/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/board.c | 7 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/clocks.c | 33 |
3 files changed, 44 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap4/Makefile b/arch/arm/cpu/armv7/omap4/Makefile index e1ccd68..e7ee0b8 100644 --- a/arch/arm/cpu/armv7/omap4/Makefile +++ b/arch/arm/cpu/armv7/omap4/Makefile @@ -30,9 +30,12 @@ SOBJS += lowlevel_init.o COBJS += board.o COBJS += clocks.o COBJS += emif.o -COBJS += mem.o COBJS += sdram_elpida.o + +ifndef CONFIG_SPL_BUILD +COBJS += mem.o COBJS += sys_info.o +endif SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 786c239..54dd509 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -155,7 +155,14 @@ void s_init(void) init_omap4_revision(); watchdog_init(); set_mux_conf_regs(); +#ifdef CONFIG_SPL_BUILD + preloader_console_init(); +#endif prcm_init(); +#ifdef CONFIG_SPL_BUILD + /* For regular u-boot sdram_init() is called from dram_init() */ + sdram_init(); +#endif } /* diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index e8d3a52..f1e233a 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -791,6 +791,39 @@ void lock_dpll(u32 *const base) wait_for_lock(base); } +void setup_clocks_for_console(void) +{ + /* Do not add any spl_debug prints in this function */ + clrsetbits_le32(&prcm->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_SW_WKUP << + CD_CLKCTRL_CLKTRCTRL_SHIFT); + + /* Enable all UARTs - console will be on one of them */ + clrsetbits_le32(&prcm->cm_l4per_uart1_clkctrl, + MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + + clrsetbits_le32(&prcm->cm_l4per_uart2_clkctrl, + MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + + clrsetbits_le32(&prcm->cm_l4per_uart3_clkctrl, + MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + + clrsetbits_le32(&prcm->cm_l4per_uart3_clkctrl, + MODULE_CLKCTRL_MODULEMODE_MASK, + MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN << + MODULE_CLKCTRL_MODULEMODE_SHIFT); + + clrsetbits_le32(&prcm->cm_l4per_clkstctrl, CD_CLKCTRL_CLKTRCTRL_MASK, + CD_CLKCTRL_CLKTRCTRL_HW_AUTO << + CD_CLKCTRL_CLKTRCTRL_SHIFT); +} + void prcm_init(void) { switch (omap4_hw_init_context()) { |