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authorHeiko Schocher <hs@denx.de>2010-11-04 16:05:25 -0400
committerSandeep Paulraj <s-paulraj@ti.com>2010-11-04 16:05:25 -0400
commit0fc43a417c4ba5ab63dad6736a18f3bf7008f35f (patch)
tree4ba473ddce3427b9e9fdf93040ad57ebb389b18e /arch/arm/cpu/armv7/omap3
parent76ee9a2c3ba0b642e61ad282386953fcdfc659c7 (diff)
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armv7, beagle: Second SDRAM bank don;t work
since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05 on beagle board the second sdram bank didn;t longer work. Since this patch sdram settings just get copied from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH are not executed and after that mr register is also not updated. This patch adds this for the bank b. Signed-off-by: Heiko Schocher <hs@denx.de> cc: Steve Sakoman <steve@sakoman.com> cc: Sandeep Paulraj <s-paulraj@ti.com> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap3')
-rw-r--r--arch/arm/cpu/armv7/omap3/sdrc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index c75aa1d..a4979ce 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early)
&sdrc_actim_base1->ctrla);
writel(readl(&sdrc_actim_base0->ctrlb),
&sdrc_actim_base1->ctrlb);
+
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(readl(&sdrc_base->cs[CS0].mr),
+ &sdrc_base->cs[CS1].mr);
}
/*