diff options
| author | SRICHARAN R <r.sricharan@ti.com> | 2013-02-04 04:22:00 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-11 11:06:09 -0400 |
| commit | 01b753ff7badb5b8670794de3d5dd71e1c4c9baf (patch) | |
| tree | 8f65d803f009d86910345fccc4989141ec7029f4 /arch/arm/cpu/armv7/omap-common/vc.c | |
| parent | 9ca8bfea80f38e3b423e339499c861ddc24b830c (diff) | |
| download | u-boot-imx-01b753ff7badb5b8670794de3d5dd71e1c4c9baf.zip u-boot-imx-01b753ff7badb5b8670794de3d5dd71e1c4c9baf.tar.gz u-boot-imx-01b753ff7badb5b8670794de3d5dd71e1c4c9baf.tar.bz2 | |
ARM: OMAP4+: Change the PRCM structure prototype common for all Socs
The current PRCM structure prototype directly matches the hardware
register layout. So there is a need to change this for every new silicon
revision which has register space changes.
Avoiding this by making the prototye generic and populating the register
addresses seperately for all Socs.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap-common/vc.c')
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/vc.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/vc.c b/arch/arm/cpu/armv7/omap-common/vc.c index a045b77..e6e5f78 100644 --- a/arch/arm/cpu/armv7/omap-common/vc.c +++ b/arch/arm/cpu/armv7/omap-common/vc.c @@ -81,13 +81,13 @@ void omap_vc_init(u16 speed_khz) cycles_low -= 7; val = (cycles_hi << PRM_VC_CFG_I2C_CLK_SCLH_SHIFT) | (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT); - writel(val, &prcm->prm_vc_cfg_i2c_clk); + writel(val, (*prcm)->prm_vc_cfg_i2c_clk); val = CONFIG_OMAP_VC_I2C_HS_MCODE << PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT; /* No HS mode for now */ val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT; - writel(val, &prcm->prm_vc_cfg_i2c_mode); + writel(val, (*prcm)->prm_vc_cfg_i2c_mode); } /** @@ -113,14 +113,15 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data) reg_val = sa << PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT | reg_addr << PRM_VC_VAL_BYPASS_REGADDR_SHIFT | reg_data << PRM_VC_VAL_BYPASS_DATA_SHIFT; - writel(reg_val, &prcm->prm_vc_val_bypass); + writel(reg_val, (*prcm)->prm_vc_val_bypass); /* Signal VC to send data */ - writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT, &prcm->prm_vc_val_bypass); + writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT, + (*prcm)->prm_vc_val_bypass); /* Wait on VC to complete transmission */ do { - reg_val = readl(&prcm->prm_vc_val_bypass) & + reg_val = readl((*prcm)->prm_vc_val_bypass) & PRM_VC_VAL_BYPASS_VALID_BIT; if (!reg_val) break; |