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author | SRICHARAN R <r.sricharan@ti.com> | 2012-03-12 02:25:34 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:23 +0200 |
commit | 5f14d9197edc5476d3453349651d295df2dcb8c3 (patch) | |
tree | 63ab040dfd7d3e8b89f29db11e3876c681befcd1 /arch/arm/cpu/armv7/omap-common/clocks-common.c | |
parent | dc7a9e64bfdd0504e1a985b6a6121ed1b5a015d7 (diff) | |
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OMAP5: clocks: Change clock settings as required for ES1.0 silicon.
Aligning all the clock related settings like the dpll frequencies, their
respective clock outputs, etc to the ideal values recommended for
OMAP5430 ES1.0 silicon.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap-common/clocks-common.c')
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/clocks-common.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index c02d73c..a183c34 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -245,6 +245,11 @@ void configure_mpu_dpll(void) CM_CLKSEL_DCC_EN_MASK); } + setbits_le32(&prcm->cm_mpu_mpu_clkctrl, + MPU_CLKCTRL_CLKSEL_EMIF_DIV_MODE_MASK); + setbits_le32(&prcm->cm_mpu_mpu_clkctrl, + MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK); + params = get_mpu_dpll_params(); do_setup_dpll(&prcm->cm_clkmode_dpll_mpu, params, DPLL_LOCK, "mpu"); |