diff options
author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-03-20 04:21:45 +0000 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2012-03-27 09:41:16 +0200 |
commit | a7683867463481bfea84af4d60af832ddfb3da7f (patch) | |
tree | 149d710f8b97b959edec9f8d7ecedac4389b3992 /arch/arm/cpu/armv7/mx6 | |
parent | 494931a67465a95b66da346ec7bd002fdf40adee (diff) | |
download | u-boot-imx-a7683867463481bfea84af4d60af832ddfb3da7f.zip u-boot-imx-a7683867463481bfea84af4d60af832ddfb3da7f.tar.gz u-boot-imx-a7683867463481bfea84af4d60af832ddfb3da7f.tar.bz2 |
mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo
or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6')
-rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 2ac74b5..a81e2bc 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -32,7 +32,13 @@ u32 get_cpu_rev(void) { - int system_rev = 0x61000 | CHIP_REV_1_0; + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + int reg = readl(&anatop->digprog); + + /* Read mx6 variant: quad, dual or solo */ + int system_rev = (reg >> 4) & 0xFF000; + /* Read mx6 silicon revision */ + system_rev |= (reg & 0xFF) + 0x10; return system_rev; } |