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author | Richard Zhu <r65037@freescale.com> | 2014-07-15 14:19:03 +0800 |
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committer | Richard Zhu <r65037@freescale.com> | 2014-07-31 15:17:00 +0800 |
commit | ec78595a24b5ff1020baa97b6d6e79a3a3326307 (patch) | |
tree | ddb3512104efc1056df8fe1e6d145be363fcb672 /arch/arm/cpu/armv7/mx6/soc.c | |
parent | a09f718e5ace202dd14426a030268ea11c7a9ba5 (diff) | |
download | u-boot-imx-ec78595a24b5ff1020baa97b6d6e79a3a3326307.zip u-boot-imx-ec78595a24b5ff1020baa97b6d6e79a3a3326307.tar.gz u-boot-imx-ec78595a24b5ff1020baa97b6d6e79a3a3326307.tar.bz2 |
ENGR00325255 pcie:enable pcie support on imx6sx sd
Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/soc.c')
-rw-r--r-- | arch/arm/cpu/armv7/mx6/soc.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index e4393b3..fa1d6e6 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -427,6 +427,16 @@ void vadc_power_down(void) val &= ~IMX6SX_GPR5_CSI1_MUX_CTRL_MASK, writel(val, &iomux->gpr[5]); } + +void pcie_power_up(void) +{ + set_ldo_voltage(LDO_PU, 1100); /* Set VDDPU to 1.1V */ +} + +void pcie_power_off(void) +{ + set_ldo_voltage(LDO_PU, 0); /* Set VDDPU to 1.1V */ +} #endif static void imx_set_vddpu_power_down(void) |