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author | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2017-02-02 15:01:37 +0530 |
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committer | York Sun <york.sun@nxp.com> | 2017-02-03 14:31:19 -0800 |
commit | 8e63ed518dd6f03119b58af40b5f1e5bae688121 (patch) | |
tree | 8e3858170ac256ad772cceeb108f05d8bccf5aa4 /arch/arm/cpu/armv7/ls102xa/clock.c | |
parent | 1c40707e3fd791457e07e5e31975a096483ca345 (diff) | |
download | u-boot-imx-8e63ed518dd6f03119b58af40b5f1e5bae688121.zip u-boot-imx-8e63ed518dd6f03119b58af40b5f1e5bae688121.tar.gz u-boot-imx-8e63ed518dd6f03119b58af40b5f1e5bae688121.tar.bz2 |
arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv7/ls102xa/clock.c')
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/clock.c | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index 7a337e1..b7d61ad 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -19,10 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR); unsigned int cpu; const u8 core_cplx_pll[6] = { @@ -74,10 +70,7 @@ void get_sys_info(struct sys_info *sys_info) } #if defined(CONFIG_FSL_IFC) - ccr = in_be32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus; #endif } |