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authorSandor Yu <R01008@freescale.com>2014-07-04 17:13:58 +0800
committerSandor Yu <R01008@freescale.com>2014-07-07 10:05:28 +0800
commitc83fd326e810c2fff44b8b02e78406d5d04c977c (patch)
treea28b81c0c71d6c339eff812a56087ad0bd08f0bf /arch/arm/cpu/armv7/highbank
parent4ca9535c91c40da93703bd20727700cd33994f93 (diff)
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ENGR00321299 gis: clean csi0 input mux set bit in GPR
When gis enable in uboot, the CSI0 input mux select setting to vadc module, clean the bit when gis disabled. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
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