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authorTom Rini <trini@ti.com>2012-07-24 16:31:26 -0700
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:12 +0200
commit5ac3b7ada1573a8d0a6c17ce4b86ed56f77f637a (patch)
tree47e96d9ef925392e7102c89419293359a74073bf /arch/arm/cpu/armv7/am33xx/emif4.c
parentff7ec0f945d16dcd8fcb4b5347dca2770ac6cea4 (diff)
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am33xx: Rework config_io_ctrl slightly
This function sets a number of related registers to the same value (the registers in question all have the same field descriptions and are related in operation). Rather than defining a struct and setting the value repeatedly, just pass in the value. Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/emif4.c')
-rw-r--r--arch/arm/cpu/armv7/am33xx/emif4.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c
index 0190ec6..3219045 100644
--- a/arch/arm/cpu/armv7/am33xx/emif4.c
+++ b/arch/arm/cpu/armv7/am33xx/emif4.c
@@ -116,8 +116,6 @@ static void config_vtp(void)
void config_ddr(short ddr_type)
{
- struct ddr_ioctrl ioctrl;
-
enable_emif_clocks();
if (ddr_type == EMIF_REG_SDRAM_TYPE_DDR2) {
@@ -132,13 +130,7 @@ void config_ddr(short ddr_type)
writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt0rdelays0);
writel(DDR2_PHY_RANK0_DELAY, &ddrregs->dt1rdelays0);
- ioctrl.cmd1ctl = DDR2_IOCTRL_VALUE;
- ioctrl.cmd2ctl = DDR2_IOCTRL_VALUE;
- ioctrl.cmd3ctl = DDR2_IOCTRL_VALUE;
- ioctrl.data1ctl = DDR2_IOCTRL_VALUE;
- ioctrl.data2ctl = DDR2_IOCTRL_VALUE;
-
- config_io_ctrl(&ioctrl);
+ config_io_ctrl(DDR2_IOCTRL_VALUE);
/* Set CKE to be controlled by EMIF/DDR PHY */
writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);