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authorAllen Martin <amartin@nvidia.com>2012-12-19 13:02:36 -0800
committerAllen Martin <amartin@nvidia.com>2012-12-19 13:02:36 -0800
commita098cf41fdb2a6607c675f7fe4f3164617c9367e (patch)
treeb37acb36f65909e6f74cc537d73efd883a1485a6 /arch/arm/cpu/armv7/am33xx/clock.c
parentb8a7c467960ffb4d5a5e1eef5f7783fb6f594542 (diff)
parent095728803eedfce850a2f85828f79500cb09979e (diff)
downloadu-boot-imx-a098cf41fdb2a6607c675f7fe4f3164617c9367e.zip
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Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged
Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/clock.c')
-rw-r--r--arch/arm/cpu/armv7/am33xx/clock.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c
index bc2abb6..0b4cb4e 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -40,6 +40,7 @@
#define CLK_MODE_MASK 0xfffffff8
#define CLK_DIV_SEL 0xFFFFFFE0
#define CPGMAC0_IDLE 0x30000
+#define DPLL_CLKDCOLDO_GATE_CTRL 0x300
const struct cm_perpll *cmper = (struct cm_perpll *)CM_PER;
const struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP;
@@ -194,6 +195,11 @@ static void enable_per_clocks(void)
writel(PRCM_MOD_EN, &cmrtc->rtcclkctrl);
while (readl(&cmrtc->rtcclkctrl) != PRCM_MOD_EN)
;
+
+ /* MUSB */
+ writel(PRCM_MOD_EN, &cmper->usb0clkctrl);
+ while (readl(&cmper->usb0clkctrl) != PRCM_MOD_EN)
+ ;
}
static void mpu_pll_config(void)
@@ -290,6 +296,8 @@ static void per_pll_config(void)
while (readl(&cmwkup->idlestdpllper) != ST_DPLL_CLK)
;
+
+ writel(DPLL_CLKDCOLDO_GATE_CTRL, &cmwkup->clkdcoldodpllper);
}
void ddr_pll_config(unsigned int ddrpll_m)