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| author | Marek Vasut <marek.vasut@gmail.com> | 2012-01-30 14:00:01 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-27 21:19:23 +0100 |
| commit | 534dbd12197e2f40aeb29814686daf39a75d1eae (patch) | |
| tree | 1fd1d32dad8d03335ee2fd94c4691f31a26d3367 /arch/arm/cpu/arm926ejs | |
| parent | 782bb0d236840e1f3c2701119341b5b9412d55cf (diff) | |
| download | u-boot-imx-534dbd12197e2f40aeb29814686daf39a75d1eae.zip u-boot-imx-534dbd12197e2f40aeb29814686daf39a75d1eae.tar.gz u-boot-imx-534dbd12197e2f40aeb29814686daf39a75d1eae.tar.bz2 | |
i.MX28: Fix VDDIO and VDDA setup
The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Robert Deliën <robert@delien.nl>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mx28/spl_power_init.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c index 380b120..271da8d 100644 --- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c @@ -726,7 +726,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) clrsetbits_le32(&power_regs->hw_power_vddioctrl, POWER_VDDIOCTRL_TRG_MASK, diff); - if (powered_by_linreg) + if (powered_by_linreg || + (readl(&power_regs->hw_power_sts) & + POWER_STS_VDD5V_GT_VDDIO)) early_delay(1500); else { while (!(readl(&power_regs->hw_power_sts) & @@ -761,7 +763,9 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout) clrsetbits_le32(&power_regs->hw_power_vddioctrl, POWER_VDDIOCTRL_TRG_MASK, diff); - if (powered_by_linreg) + if (powered_by_linreg || + (readl(&power_regs->hw_power_sts) & + POWER_STS_VDD5V_GT_VDDIO)) early_delay(1500); else { while (!(readl(&power_regs->hw_power_sts) & @@ -819,7 +823,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) clrsetbits_le32(&power_regs->hw_power_vdddctrl, POWER_VDDDCTRL_TRG_MASK, diff); - if (powered_by_linreg) + if (powered_by_linreg || + (readl(&power_regs->hw_power_sts) & + POWER_STS_VDD5V_GT_VDDIO)) early_delay(1500); else { while (!(readl(&power_regs->hw_power_sts) & @@ -854,7 +860,9 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout) clrsetbits_le32(&power_regs->hw_power_vdddctrl, POWER_VDDDCTRL_TRG_MASK, diff); - if (powered_by_linreg) + if (powered_by_linreg || + (readl(&power_regs->hw_power_sts) & + POWER_STS_VDD5V_GT_VDDIO)) early_delay(1500); else { while (!(readl(&power_regs->hw_power_sts) & |