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| author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-09-27 10:26:54 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:12 -0700 |
| commit | 3c76add2628116872befc230cdd4df8e3a6ac5e3 (patch) | |
| tree | 93204c63ca403a4f0133fb7adeea039a69ea46f5 /arch/arm/cpu/arm926ejs/mx25 | |
| parent | 323846561a7253433818d0e04630cb83433fa0f1 (diff) | |
| download | u-boot-imx-3c76add2628116872befc230cdd4df8e3a6ac5e3.zip u-boot-imx-3c76add2628116872befc230cdd4df8e3a6ac5e3.tar.gz u-boot-imx-3c76add2628116872befc230cdd4df8e3a6ac5e3.tar.bz2 | |
mx25: Fix decode_pll
The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mx25')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mx25/generic.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 4f1aad0..d34e84c 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -48,7 +48,7 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) { unsigned int mfi = (pll >> CCM_PLL_MFI_SHIFT) & CCM_PLL_MFI_MASK; - unsigned int mfn = (pll >> CCM_PLL_MFN_SHIFT) + int mfn = (pll >> CCM_PLL_MFN_SHIFT) & CCM_PLL_MFN_MASK; unsigned int mfd = (pll >> CCM_PLL_MFD_SHIFT) & CCM_PLL_MFD_MASK; @@ -56,9 +56,12 @@ static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) & CCM_PLL_PD_MASK; mfi = mfi <= 5 ? 5 : mfi; + mfn = mfn >= 512 ? mfn - 1024 : mfn; + mfd += 1; + pd += 1; - return lldiv(2 * (u64) f_ref * (mfi * (mfd + 1) + mfn), - (mfd + 1) * (pd + 1)); + return lldiv(2 * (u64) f_ref * (mfi * mfd + mfn), + mfd * pd); } static ulong imx_get_mpllclk(void) |