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| author | Mans Rullgard <mans@mansr.com> | 2010-04-14 11:08:00 +0100 |
|---|---|---|
| committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-09-08 14:51:04 -0400 |
| commit | 29844707469854d9fab181edd6abe2f25fb5d208 (patch) | |
| tree | 15956c1e6c4d6ec6b8af92bd639e4836205df10b /arch/arm/cpu/arm926ejs/cpu.c | |
| parent | 7c281c985c33318d0795e43909e0d26f870f98ed (diff) | |
| download | u-boot-imx-29844707469854d9fab181edd6abe2f25fb5d208.zip u-boot-imx-29844707469854d9fab181edd6abe2f25fb5d208.tar.gz u-boot-imx-29844707469854d9fab181edd6abe2f25fb5d208.tar.bz2 | |
ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functions
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required. On later versions,
and on newer devices, this bit is banked and we can set it directly.
The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.
This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/cpu.c')
0 files changed, 0 insertions, 0 deletions