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authorYuichiro Goto <goto.yuichiro@espark.co.jp>2016-02-25 10:23:34 +0900
committerTom Rini <trini@konsulko.com>2016-02-29 14:49:35 -0500
commitba10b852fe3a5d6188dfa43cced4bfbaf3515df1 (patch)
treecbc70ad9067f80250c5c700e4b7d6330fec67061 /arch/arm/cpu/arm920t
parenta15221e0800e2ea2b5d39a033c9538e7a30f3a52 (diff)
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ARM: start.S: fix typo
Fix typo in comment about position of 'A' bit in several start.S. Signed-off-by: Yuichiro Goto <goto.yuichiro@espark.co.jp>
Diffstat (limited to 'arch/arm/cpu/arm920t')
-rw-r--r--arch/arm/cpu/arm920t/start.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 0740450..69cabeb 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -131,7 +131,7 @@ cpu_init_crit:
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
- orr r0, r0, #0x00000002 @ set bit 2 (A) Align
+ orr r0, r0, #0x00000002 @ set bit 1 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0