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| author | Mike Williams <mike@mikebwilliams.com> | 2011-07-22 04:01:30 +0000 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-07-28 21:27:36 +0200 |
| commit | 1626308797ac4184e73e56d275a1b8da11a62d5b (patch) | |
| tree | d12fd0d610303c3d2351d8ace314a643f20e0fc9 /arch/arm/cpu/arm920t | |
| parent | 2469c4b2dbdd601a4e44ecf9925b99bd2cd1b43f (diff) | |
| download | u-boot-imx-1626308797ac4184e73e56d275a1b8da11a62d5b.zip u-boot-imx-1626308797ac4184e73e56d275a1b8da11a62d5b.tar.gz u-boot-imx-1626308797ac4184e73e56d275a1b8da11a62d5b.tar.bz2 | |
cleanup: Fix typos and misspellings in various files.
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams <mike@mikebwilliams.com>
Diffstat (limited to 'arch/arm/cpu/arm920t')
| -rw-r--r-- | arch/arm/cpu/arm920t/at91/timer.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/start.S | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c index c321e28..91607b5 100644 --- a/arch/arm/cpu/arm920t/at91/timer.c +++ b/arch/arm/cpu/arm920t/at91/timer.c @@ -59,7 +59,7 @@ int timer_init(void) when the value in TC_RC is reached */ writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr); - writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */ + writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */ writel(TIMER_LOAD_VAL, &tc->tc[0].rc); writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 2a53667..0090f89 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -142,11 +142,11 @@ copyex: # if defined(CONFIG_S3C2400) # define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */ # define CLKDIVN 0x14800014 /* clock divisor register */ #else # define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */ # define INTSUBMSK 0x4A00001C # define CLKDIVN 0x4C000014 /* clock divisor register */ # endif |