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authorJens Scharsig <js_at_ng@scharsoft.de>2011-02-19 06:17:02 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-06-21 22:26:21 +0200
commit807339944419aa238003e6361be2513c719ab26c (patch)
treeec0d80dc60a2130649a31c432da90f99ca825496 /arch/arm/cpu/arm920t
parentfc97102810393cbf27b5d2b6f937de7edd67435c (diff)
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update arm/at91rm9200 work with rework rework110202
* convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
Diffstat (limited to 'arch/arm/cpu/arm920t')
-rw-r--r--arch/arm/cpu/arm920t/at91/reset.c2
-rw-r--r--arch/arm/cpu/arm920t/at91/timer.c12
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/cpu/arm920t/at91/reset.c b/arch/arm/cpu/arm920t/at91/reset.c
index 51043ec..4fa0f98 100644
--- a/arch/arm/cpu/arm920t/at91/reset.c
+++ b/arch/arm/cpu/arm920t/at91/reset.c
@@ -42,7 +42,7 @@ void __attribute__((weak)) board_reset(void)
void reset_cpu(ulong ignored)
{
- at91_st_t *st = (at91_st_t *) AT91_ST_BASE;
+ at91_st_t *st = (at91_st_t *) ATMEL_BASE_ST;
#if defined(CONFIG_AT91RM9200_USART)
/*shutdown the console to avoid strange chars during reset */
serial_exit();
diff --git a/arch/arm/cpu/arm920t/at91/timer.c b/arch/arm/cpu/arm920t/at91/timer.c
index d9a024f..f0ad7d6 100644
--- a/arch/arm/cpu/arm920t/at91/timer.c
+++ b/arch/arm/cpu/arm920t/at91/timer.c
@@ -32,7 +32,7 @@
#include <common.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <asm/arch/at91_tc.h>
#include <asm/arch/at91_pmc.h>
@@ -44,11 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
int timer_init(void)
{
- at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
- at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
+ at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
+ at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
/* enables TC1.0 clock */
- writel(1 << AT91_ID_TC0, &pmc->pcer); /* enable clock */
+ writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */
writel(0, &tc->bcr);
writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
@@ -96,14 +96,14 @@ void __udelay(unsigned long usec)
void reset_timer_masked(void)
{
/* reset time */
- at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
+ at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
gd->tbl = 0;
}
ulong get_timer_raw(void)
{
- at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
+ at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
u32 now;
now = readl(&tc->tc[0].cv) & 0x0000ffff;