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| author | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-11-12 22:24:06 +0100 |
| commit | d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0 (patch) | |
| tree | 07dd5889d73f4b66ad608815adcf6f2f953d9501 /arch/arm/cpu/arm920t/s3c24x0/usb.c | |
| parent | 66fca016057b1c6b697552cc7220ebada9d4f82d (diff) | |
| parent | 0c0892be0d93a5a892b93739c5eb3bf692fed4ff (diff) | |
| download | u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.zip u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.gz u-boot-imx-d963e84c92a63b4e6c4f2f80482a5ecbe9b24fe0.tar.bz2 | |
Merge branch 'master' of /home/wd/git/u-boot/master
Diffstat (limited to 'arch/arm/cpu/arm920t/s3c24x0/usb.c')
| -rw-r--r-- | arch/arm/cpu/arm920t/s3c24x0/usb.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm920t/s3c24x0/usb.c b/arch/arm/cpu/arm920t/s3c24x0/usb.c index e468ed0..226a3f6 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/usb.c +++ b/arch/arm/cpu/arm920t/s3c24x0/usb.c @@ -39,14 +39,14 @@ int usb_cpu_init(void) * Set the 48 MHz UPLL clocking. Values are taken from * "PLL value selection guide", 6-23, s3c2400_UM.pdf. */ - writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON); + writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon); /* 1 = use pads related USB for USB host */ - writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR); + writel(readl(&gpio->misccr) | 0x8, &gpio->misccr); /* * Enable USB host clock. */ - writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON); + writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon); return 0; } @@ -55,14 +55,14 @@ int usb_cpu_stop(void) { struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); /* may not want to do this */ - writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON); + writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon); return 0; } int usb_cpu_init_fail(void) { struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power(); - writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON); + writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon); return 0; } |