arm: Remove support for s3c4510

This stuff has been rotting in the tree for a year now. Remove it.

Signed-off-by: Marek Vasut <marex@denx.de>

1 files changed, 1 insertions, 105 deletions

diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index 5b21cc3..e3b59fe 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -45,28 +45,10 @@
 #define READ_TIMER (TM2STAT & NETARM_GEN_TSTAT_CTC_MASK)
 #endif
 
-#ifdef CONFIG_S3C4510B
-/* require interrupts for the S3C4510B */
-# ifndef CONFIG_USE_IRQ
-#  error CONFIG_USE_IRQ _must_ be defined when using CONFIG_S3C4510B
-# else
-static struct _irq_handler IRQ_HANDLER[N_IRQS];
-# endif
-#endif	/* CONFIG_S3C4510B */
-
 #ifdef CONFIG_USE_IRQ
 void do_irq (struct pt_regs *pt_regs)
 {
-#if defined(CONFIG_S3C4510B)
-	unsigned int pending;
-
-	while ( (pending = GET_REG( REG_INTOFFSET)) != 0x54) {  /* sentinal value for no pending interrutps */
-		IRQ_HANDLER[pending>>2].m_func( IRQ_HANDLER[pending>>2].m_data);
-
-		/* clear pending interrupt */
-		PUT_REG( REG_INTPEND, (1<<(pending>>2)));
-	}
-#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
 	/* No do_irq() for IntegratorAP/CM720T as yet */
 #else
 #error do_irq() not defined for this CPU type
@@ -74,23 +56,6 @@ void do_irq (struct pt_regs *pt_regs)
 }
 #endif
 
-#ifdef CONFIG_S3C4510B
-static void default_isr( void *data) {
-	printf ("default_isr():  called for IRQ %d\n", (int)data);
-}
-
-static void timer_isr( void *data) {
-	unsigned int *pTime = (unsigned int *)data;
-
-	(*pTime)++;
-	if ( !(*pTime % (CONFIG_SYS_HZ/4))) {
-		/* toggle LED 0 */
-		PUT_REG( REG_IOPDATA, GET_REG(REG_IOPDATA) ^ 0x1);
-	}
-
-}
-#endif
-
 #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
 	/* Use IntegratorAP routines in board/integratorap.c */
 #else
@@ -98,32 +63,6 @@ static void timer_isr( void *data) {
 static ulong timestamp;
 static ulong lastdec;
 
-#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B)
-int arch_interrupt_init (void)
-{
-	int i;
-
-	/* install default interrupt handlers */
-	for ( i = 0; i < N_IRQS; i++) {
-		IRQ_HANDLER[i].m_data = (void *)i;
-		IRQ_HANDLER[i].m_func = default_isr;
-	}
-
-	/* configure interrupts for IRQ mode */
-	PUT_REG( REG_INTMODE, 0x0);
-	/* clear any pending interrupts */
-	PUT_REG( REG_INTPEND, 0x1FFFFF);
-
-	lastdec = 0;
-
-	/* install interrupt handler for timer */
-	IRQ_HANDLER[INT_TIMER0].m_data = (void *)&timestamp;
-	IRQ_HANDLER[INT_TIMER0].m_func = timer_isr;
-
-	return 0;
-}
-#endif
-
 int timer_init (void)
 {
 #if defined(CONFIG_NETARM)
@@ -137,29 +76,6 @@ int timer_init (void)
 
 	/* set timer 2 counter */
 	lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_S3C4510B)
-	/* configure free running timer 0 */
-	PUT_REG( REG_TMOD, 0x0);
-	/* Stop timer 0 */
-	CLR_REG( REG_TMOD, TM0_RUN);
-
-	/* Configure for interval mode */
-	CLR_REG( REG_TMOD, TM1_TOGGLE);
-
-	/*
-	 * Load Timer data register with count down value.
-	 * count_down_val = CONFIG_SYS_SYS_CLK_FREQ/CONFIG_SYS_HZ
-	 */
-	PUT_REG( REG_TDATA0, (CONFIG_SYS_SYS_CLK_FREQ / CONFIG_SYS_HZ));
-
-	/*
-	 * Enable global interrupt
-	 * Enable timer0 interrupt
-	 */
-	CLR_REG( REG_INTMASK, ((1<<INT_GLOBAL) | (1<<INT_TIMER0)));
-
-	/* Start timer */
-	SET_REG( REG_TMOD, TM0_RUN);
 #elif defined(CONFIG_TEGRA)
 	/* No timer routines for tegra as yet */
 	lastdec = 0;
@@ -237,26 +153,6 @@ void udelay_masked (unsigned long usec)
 	} while (diff >= 0);
 }
 
-#elif defined(CONFIG_S3C4510B)
-
-ulong get_timer (ulong base)
-{
-	return timestamp - base;
-}
-
-void __udelay (unsigned long usec)
-{
-	u32 ticks;
-
-	ticks = (usec * CONFIG_SYS_HZ) / 1000000;
-
-	ticks += get_timer (0);
-
-	while (get_timer (0) < ticks)
-		/*NOP*/;
-
-}
-
 #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
 	/* No timer routines for IntegratorAP/CM720T as yet */
 #elif defined(CONFIG_TEGRA)