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authorHelmut Raiger <helmut.raiger@hale.at>2011-09-29 05:45:03 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:30 +0200
commit47c5455a489c8e558ecb002a3a97a030ce490f9e (patch)
treea0ecca9a95071e6a963ed4d4abedfa5bf8e7745b /arch/arm/cpu/arm1136
parent43883dc3e50e224ea68031bf34b766544311bf60 (diff)
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mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm1136')
-rw-r--r--arch/arm/cpu/arm1136/mx31/generic.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 5524b23..78df7b9 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,7 @@
#include <asm/arch/imx-regs.h>
#include <asm/arch/clock.h>
#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -140,6 +141,16 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+ struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
+ struct mx31_weim_cscr *cscr = &weim->cscr[cs];
+
+ writel(weimcs->upper, &cscr->upper);
+ writel(weimcs->lower, &cscr->lower);
+ writel(weimcs->additional, &cscr->additional);
+}
+
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },