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| author | Stefano Babic <sbabic@denx.de> | 2015-02-13 11:17:01 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-02-13 11:17:01 +0100 |
| commit | e72d344386bf80738fab7a6bd37cb321f443093a (patch) | |
| tree | d3e02055e6aa903ab80ef87c78d2f38e93981dcf /arch/arc/include | |
| parent | 258c98f8d36ef35d7cb7604847ba73e64d702c2a (diff) | |
| parent | bd2a4888b123713adec271d6c8040ca9f609aa2f (diff) | |
| download | u-boot-imx-e72d344386bf80738fab7a6bd37cb321f443093a.zip u-boot-imx-e72d344386bf80738fab7a6bd37cb321f443093a.tar.gz u-boot-imx-e72d344386bf80738fab7a6bd37cb321f443093a.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/arc/include')
| -rw-r--r-- | arch/arc/include/asm/arcregs.h | 8 | ||||
| -rw-r--r-- | arch/arc/include/asm/cache.h | 19 | ||||
| -rw-r--r-- | arch/arc/include/asm/config.h | 2 | ||||
| -rw-r--r-- | arch/arc/include/asm/sections.h | 3 |
4 files changed, 22 insertions, 10 deletions
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 5d48d11..6a36a81 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -7,6 +7,8 @@ #ifndef _ASM_ARC_ARCREGS_H #define _ASM_ARC_ARCREGS_H +#include <asm/cache.h> + /* * ARC architecture has additional address space - auxiliary registers. * These registers are mostly used for configuration purposes. @@ -21,9 +23,10 @@ #define ARC_AUX_IC_IVIC 0x10 #define ARC_AUX_IC_CTRL 0x11 #define ARC_AUX_IC_IVIL 0x19 -#if (CONFIG_ARC_MMU_VER > 2) +#if (CONFIG_ARC_MMU_VER == 3) #define ARC_AUX_IC_PTAG 0x1E #endif +#define ARC_BCR_IC_BUILD 0x77 /* Timer related auxiliary registers */ #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */ @@ -39,9 +42,10 @@ #define ARC_AUX_DC_IVDL 0x4A #define ARC_AUX_DC_FLSH 0x4B #define ARC_AUX_DC_FLDL 0x4C -#if (CONFIG_ARC_MMU_VER > 2) +#if (CONFIG_ARC_MMU_VER == 3) #define ARC_AUX_DC_PTAG 0x5C #endif +#define ARC_BCR_DC_BUILD 0x72 #ifndef __ASSEMBLY__ /* Accessors for auxiliary registers */ diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index 16e7568..2725961 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -9,15 +9,18 @@ #include <config.h> -/* - * The current upper bound for ARC L1 data cache line sizes is 128 bytes. - * We use that value for aligning DMA buffers unless the board config has - * specified an alternate cache line size. - */ -#ifdef CONFIG_SYS_CACHELINE_SIZE -#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +#ifdef CONFIG_ARC_CACHE_LINE_SHIFT +#define CONFIG_SYS_CACHELINE_SIZE (1 << CONFIG_ARC_CACHE_LINE_SHIFT) +#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE #else -#define ARCH_DMA_MINALIGN 128 +/* Satisfy users of ARCH_DMA_MINALIGN */ +#define ARCH_DMA_MINALIGN 128 +#endif + +#if defined(CONFIG_ARC_MMU_V2) +#define CONFIG_ARC_MMU_VER 2 +#elif defined(CONFIG_ARC_MMU_V3) +#define CONFIG_ARC_MMU_VER 3 #endif #endif /* __ASM_ARC_CACHE_H */ diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index e5be078..b4e9099 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -7,8 +7,10 @@ #ifndef __ASM_ARC_CONFIG_H_ #define __ASM_ARC_CONFIG_H_ +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_GENERIC_GLOBAL_DATA #define CONFIG_SYS_BOOT_RAMDISK_HIGH +#define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_LMB diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h index 18484a1..b8f2a85 100644 --- a/arch/arc/include/asm/sections.h +++ b/arch/arc/include/asm/sections.h @@ -10,5 +10,8 @@ #include <asm-generic/sections.h> extern ulong __text_end; +extern ulong __ivt_start; +extern ulong __ivt_end; +extern ulong __image_copy_start; #endif /* __ASM_ARC_SECTIONS_H */ |