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authorAlexey Brodkin <abrodkin@synopsys.com>2015-03-17 14:55:14 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2015-04-03 09:47:49 +0300
commit01496c4fac227221e67d93cb9cc14f48fb98a2b6 (patch)
treef0181ac27f286dbf4902e73b64d2bfffe4e1e6ec /arch/arc/dts
parentb903792e4492a710d6a58ccd136c9b3a2f684180 (diff)
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serial-arc: switch to DM
Now when all infrastructure in ARC is ready for it let's switch ARC UART to driver model. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arc/dts')
-rw-r--r--arch/arc/dts/Makefile11
-rw-r--r--arch/arc/dts/arcangel4.dts24
-rw-r--r--arch/arc/dts/skeleton.dtsi13
3 files changed, 48 insertions, 0 deletions
diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile
new file mode 100644
index 0000000..a155311
--- /dev/null
+++ b/arch/arc/dts/Makefile
@@ -0,0 +1,11 @@
+dtb-$(CONFIG_TARGET_ARCANGEL4) += arcangel4.dtb
+
+targets += $(dtb-y)
+
+DTC_FLAGS += -R 4 -p 0x1000
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+ @:
+
+clean-files := *.dtb
diff --git a/arch/arc/dts/arcangel4.dts b/arch/arc/dts/arcangel4.dts
new file mode 100644
index 0000000..bfcb9d8
--- /dev/null
+++ b/arch/arc/dts/arcangel4.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+/dts-v1/;
+
+#include "skeleton.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ console = &arcuart0;
+ };
+
+ arcuart0: serial@0xc0fc1000 {
+ compatible = "snps,arc-uart";
+ reg = <0xc0fc1000 0x100>;
+ clock-frequency = <80000000>;
+ };
+
+};
diff --git a/arch/arc/dts/skeleton.dtsi b/arch/arc/dts/skeleton.dtsi
new file mode 100644
index 0000000..b41d241
--- /dev/null
+++ b/arch/arc/dts/skeleton.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Skeleton device tree; the bare minimum needed to boot; just include and
+ * add a compatible value. The bootloader will typically populate the memory
+ * node.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};