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authorShinya Kuribayashi <skuribay@pobox.com>2011-05-07 00:18:13 +0900
committerShinya Kuribayashi <skuribay@pobox.com>2011-05-10 00:12:31 +0900
commit68cebb8027c282a949ac0ca7dcb5baabd1c6879a (patch)
tree43082c3da2b94caab4622480520465e0855e65a9 /api/api_storage.c
parent660da0947abff3bc98bb0baa37a6db5050ff46d6 (diff)
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MIPS: Move timer code to arch/mips/cpu/$(CPU)/
Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work. We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers. With this change, each $(CPU)/ directory can have its own timer code. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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