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authorPeter Tyser <ptyser@xes-inc.com>2010-10-28 15:24:59 -0500
committerWolfgang Denk <wd@denx.de>2010-11-14 23:45:57 +0100
commita72dbae2ccd38d2b32f8b814f5a528c88be65bd3 (patch)
tree59d540d16474f386d3600fc5d0f9fdceff21c7da /README
parent258ccd68170b7279ec7d4805c7b914c90374e711 (diff)
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fsl_pci_init: Make fsl_pci_init_port() PCI/PCIe aware
Previously fsl_pci_init_port() always assumed that a port was a PCIe port and would incorrectly print messages for a PCI port such as the following on bootup: PCI1: 32 bit, 33 MHz, sync, host, arbiter Scanning PCI bus 00 PCIE1 on bus 00 - 00 This change corrects the output of fsl_pci_init_port(): PCI1: 32 bit, 33 MHz, sync, host, arbiter Scanning PCI bus 00 PCI1 on bus 00 - 00 Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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