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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2013-10-29 13:33:51 +0900
committerHeiko Schocher <hs@denx.de>2013-11-13 06:08:26 +0100
commit2035d77d790044f389a18c0e6baa05e86d4b32a0 (patch)
tree96a4e48046a2758772060696cb4c2606540cd09e /README
parent63c4f17b2f8017d22241522a48c765073b8791b0 (diff)
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i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework
This updates to new I2C framwwork on sh_i2c. And this also updates boards(kzm9g and ecovec) that using sh_i2c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'README')
-rw-r--r--README18
1 files changed, 18 insertions, 0 deletions
diff --git a/README b/README
index a70475f..9c6d058 100644
--- a/README
+++ b/README
@@ -2040,6 +2040,24 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
- CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
+ - drivers/i2c/sh_i2c.c:
+ - activate this driver with CONFIG_SYS_I2C_SH
+ - This driver adds from 2 to 5 i2c buses
+
+ - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
+ - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
+ - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
+ - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
+ - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
+ - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
+ - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
+ - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
+ - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
+ - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
+ - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
+ - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
+ - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES