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authorFranck Jullien <franck.jullien@gmail.com>2014-05-21 22:43:49 +0200
committerTom Rini <trini@ti.com>2014-06-05 14:44:56 -0400
commitc346cf13509c9bfcd98c679a9822bb346432b9b6 (patch)
treee780e1d48bde6ffeef1aae67acffb2e76a0c66d3 /README
parent08be2836df0b07aac65fea583b762335569fd47a (diff)
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openrisc: update SPR registers definition
The OpenRISC architecture specification v1.0 defines new SPR registers. This patch adds registers definition for group 0 and update bit definitions for the CPU configuration register. Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
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