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authorYing Zhang <b40530@freescale.com>2013-08-16 15:16:11 +0800
committerYork Sun <yorksun@freescale.com>2013-08-20 09:47:26 -0700
commitbb0dc1084f5dcf1dfd951d320c932d08bccbe429 (patch)
treeba59aece0acb35211a67f503e25cac3111788fc4 /README
parent0151d99d74ec4b8a33133acf94ebcd25d717dfd7 (diff)
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powerpc: mpc85xx: Support booting from SD Card with SPL
The code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'README')
-rw-r--r--README4
1 files changed, 4 insertions, 0 deletions
diff --git a/README b/README
index 953ff17..301d1a9 100644
--- a/README
+++ b/README
@@ -3090,6 +3090,10 @@ FIT uImage format:
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
+ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+ Set for the SPL on PPC mpc8xxx targets, support for
+ arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary.
+
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,