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author | Tom Rini <trini@ti.com> | 2013-10-17 12:09:49 -0400 |
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committer | Tom Rini <trini@ti.com> | 2013-10-17 12:09:49 -0400 |
commit | 9dff87a297dabe4af60012ad2d990ff8967f1d55 (patch) | |
tree | 484a3f5785536d6996c68f538b48590d71b6bd8c /README | |
parent | 287df01e6aef0464c5e5bcbd7e87aa4ff1f24f5a (diff) | |
parent | 9a2a73d29fa395f42f3fb477ac99dda4d7f2f21f (diff) | |
download | u-boot-imx-9dff87a297dabe4af60012ad2d990ff8967f1d55.zip u-boot-imx-9dff87a297dabe4af60012ad2d990ff8967f1d55.tar.gz u-boot-imx-9dff87a297dabe4af60012ad2d990ff8967f1d55.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Diffstat (limited to 'README')
-rw-r--r-- | README | 31 |
1 files changed, 28 insertions, 3 deletions
@@ -1994,15 +1994,40 @@ CBFS (Coreboot Filesystem) support second bus. - drivers/i2c/tegra_i2c.c: - - activate this driver with CONFIG_SYS_I2C_TEGRA - - This driver adds 4 i2c buses with a fix speed from - 100000 and the slave addr 0! + - activate this driver with CONFIG_SYS_I2C_TEGRA + - This driver adds 4 i2c buses with a fix speed from + 100000 and the slave addr 0! - drivers/i2c/ppc4xx_i2c.c - activate this driver with CONFIG_SYS_I2C_PPC4XX - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1 + - drivers/i2c/i2c_mxc.c + - activate this driver with CONFIG_SYS_I2C_MXC + - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED + - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE + - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED + - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE + - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED + - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE + If thoses defines are not set, default value is 100000 + for speed, and 0 for slave. + + - drivers/i2c/rcar_i2c.c: + - activate this driver with CONFIG_SYS_I2C_RCAR + - This driver adds 4 i2c buses + + - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0 + - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0 + - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1 + - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1 + - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2 + - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2 + - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3 + - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3 + - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses + additional defines: CONFIG_SYS_NUM_I2C_BUSES |