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authorYork Sun <yorksun@freescale.com>2011-06-07 09:42:16 +0800
committerKumar Gala <galak@kernel.crashing.org>2011-07-11 13:24:20 -0500
commit1b3e3c4f263ff20b95c3514eefbde47e950c39e0 (patch)
tree4043fc4d718f49dee1a2d88daa1b9ef87b435980 /README
parentaeb6716a12c68644d6dc1e798b724086c3cfcd24 (diff)
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powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing data from DDR chip datasheet, implemneted in board-specific files or header files. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'README')
-rw-r--r--README6
1 files changed, 6 insertions, 0 deletions
diff --git a/README b/README
index 2da0f96..1e2d4d3 100644
--- a/README
+++ b/README
@@ -2948,6 +2948,12 @@ Low Level (hardware related) configuration options:
one, specify here. Note that the value must resolve
to something your driver can deal with.
+- CONFIG_SYS_DDR_RAW_TIMING
+ Get DDR timing information from other than SPD. Common with
+ soldered DDR chips onboard without SPD. DDR raw timing
+ parameters are extracted from datasheet and hard-coded into
+ header files or board specific files.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.