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author | Liu Gang <Gang.Liu@freescale.com> | 2012-08-09 05:10:01 +0000 |
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committer | Andy Fleming <afleming@freescale.com> | 2012-08-23 10:24:15 -0500 |
commit | fc54c7fa0addfc0e33b703be0502395920d2926b (patch) | |
tree | 63b6a6bf7ce96947e5c6f07774dd9d0b5a53865a /README | |
parent | 81fa73bab05f491dd6f27c9afbc6952f54173b41 (diff) | |
download | u-boot-imx-fc54c7fa0addfc0e33b703be0502395920d2926b.zip u-boot-imx-fc54c7fa0addfc0e33b703be0502395920d2926b.tar.gz u-boot-imx-fc54c7fa0addfc0e33b703be0502395920d2926b.tar.bz2 |
powerpc/corenet_ds: Update README and README.srio-pcie-boot-corenet
Added descriptions about boot from PCIE in the files README and
doc/README.srio-pcie-boot-corenet, and changed the name of the
doc/README.srio-boot-corenet to doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'README')
-rw-r--r-- | README | 12 |
1 files changed, 6 insertions, 6 deletions
@@ -3092,12 +3092,12 @@ to save the current settings. These two #defines specify the address and size of the environment area within the remote memory space. The local device can get the environment from remote memory - space by SRIO or other links. + space by SRIO or PCIE links. BE CAREFUL! For some special cases, the local device can not use "saveenv" command. For example, the local device will get the -environment stored in a remote NOR flash by SRIO link, but it can -not erase, write this NOR flash by SRIO interface. +environment stored in a remote NOR flash by SRIO or PCIE link, +but it can not erase, write this NOR flash by SRIO or PCIE interface. - CONFIG_ENV_IS_IN_NAND: @@ -3538,9 +3538,9 @@ within that device. - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE Specifies that QE/FMAN firmware is located in the remote (master) memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which - can be mapped from slave TLB->slave LAW->slave SRIO outbound window - ->master inbound window->master LAW->the ucode address in master's - NOR flash. + can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound + window->master inbound window->master LAW->the ucode address in + master's memory space. Building the Software: ====================== |