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author | Wolfgang Denk <wd@denx.de> | 2012-02-13 23:15:25 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2012-02-13 23:15:25 +0100 |
commit | e9d44b35beb45869863f3ca6929089d9df4df3e5 (patch) | |
tree | 4382c3c41c944e23dc846393e52275b63d302ba3 /README | |
parent | 06576b2efcf3d67797437488e90e989b8b48c9f2 (diff) | |
parent | f61ec45eb5ad819520396f91385ef3855059c1dd (diff) | |
download | u-boot-imx-e9d44b35beb45869863f3ca6929089d9df4df3e5.zip u-boot-imx-e9d44b35beb45869863f3ca6929089d9df4df3e5.tar.gz u-boot-imx-e9d44b35beb45869863f3ca6929089d9df4df3e5.tar.bz2 |
Merge branch 'sf' of git://git.denx.de/u-boot-blackfin
* 'sf' of git://git.denx.de/u-boot-blackfin:
README: Add description of SPI Flash (SF) command configuration
sf command: allow default bus and chip selects
sf: eeprom_m95xxx: set a sane default timeout
sf: eeprom_m95xxx: fix up style
Diffstat (limited to 'README')
-rw-r--r-- | README | 20 |
1 files changed, 20 insertions, 0 deletions
@@ -815,6 +815,7 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) + CONFIG_CMD_SF * Read/write/erase SPI NOR flash CONFIG_CMD_SHA1SUM print sha1 memory digest (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOURCE "source" command Support @@ -2197,6 +2198,25 @@ The following options need to be configured: allows to read/write in Dataflash via the standard commands cp, md... +- Serial Flash support + CONFIG_CMD_SF + + Defining this option enables SPI flash commands + 'sf probe/read/write/erase/update'. + + Usage requires an initial 'probe' to define the serial + flash parameters, followed by read/write/erase/update + commands. + + The following defaults may be provided by the platform + to handle the common case when only a single serial + flash is present on the system. + + CONFIG_SF_DEFAULT_BUS Bus identifier + CONFIG_SF_DEFAULT_CS Chip-select + CONFIG_SF_DEFAULT_MODE (see include/spi.h) + CONFIG_SF_DEFAULT_SPEED in Hz + - SystemACE Support: CONFIG_SYSTEMACE |